From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:39220) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyxP5-000190-9z for qemu-devel@nongnu.org; Wed, 27 Feb 2019 06:29:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyxAN-0006MQ-15 for qemu-devel@nongnu.org; Wed, 27 Feb 2019 06:14:27 -0500 From: David Hildenbrand Date: Wed, 27 Feb 2019 12:14:11 +0100 Message-Id: <20190227111411.22890-3-david@redhat.com> In-Reply-To: <20190227111411.22890-1-david@redhat.com> References: <20190227111411.22890-1-david@redhat.com> Subject: [Qemu-devel] [PATCH RFC 2/2] tests/tcg: target/s390: Add test for VECTOR LOAD GR FROM VR ELEMENT List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Thomas Huth , Cornelia Huck , Richard Henderson , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , David Hildenbrand We want to make use of vectors, so use -march=z13. To make it compile, use a reasonable optimization level (-O2), which seems to work just fine with all tests. Add some infrastructure for checking if SIGILL will be properly triggered. Signed-off-by: David Hildenbrand --- tests/tcg/s390x/Makefile.target | 3 ++- tests/tcg/s390x/helper.h | 28 +++++++++++++++++++++ tests/tcg/s390x/signal_helper.inc.c | 39 +++++++++++++++++++++++++++++ tests/tcg/s390x/vlgv.c | 37 +++++++++++++++++++++++++++ 4 files changed, 106 insertions(+), 1 deletion(-) create mode 100644 tests/tcg/s390x/helper.h create mode 100644 tests/tcg/s390x/signal_helper.inc.c create mode 100644 tests/tcg/s390x/vlgv.c diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target index 151dc075aa..d1ae755ab9 100644 --- a/tests/tcg/s390x/Makefile.target +++ b/tests/tcg/s390x/Makefile.target @@ -1,8 +1,9 @@ VPATH+=$(SRC_PATH)/tests/tcg/s390x -CFLAGS+=-march=zEC12 -m64 +CFLAGS+=-march=z13 -m64 -O2 TESTS+=hello-s390x TESTS+=csst TESTS+=ipm TESTS+=exrl-trt TESTS+=exrl-trtr TESTS+=pack +TESTS+=vlgv diff --git a/tests/tcg/s390x/helper.h b/tests/tcg/s390x/helper.h new file mode 100644 index 0000000000..845b8bb504 --- /dev/null +++ b/tests/tcg/s390x/helper.h @@ -0,0 +1,28 @@ +#ifndef TEST_TCG_S390x_VECTOR_H +#define TEST_TCG_S390x_VECTOR_H + +#include + +#define ES_8 0 +#define ES_16 1 +#define ES_32 2 +#define ES_64 3 +#define ES_128 4 + +typedef union S390Vector { + __uint128_t v; + uint64_t q[2]; + uint32_t d[4]; + uint16_t w[8]; + uint8_t h[16]; +} S390Vector; + +static inline void check(const char *s, bool cond) +{ + if (!cond) { + fprintf(stderr, "Check failed: %s\n", s); + exit(-1); + } +} + +#endif /* TEST_TCG_S390x_VECTOR_H */ diff --git a/tests/tcg/s390x/signal_helper.inc.c b/tests/tcg/s390x/signal_helper.inc.c new file mode 100644 index 0000000000..5bd69ca76a --- /dev/null +++ b/tests/tcg/s390x/signal_helper.inc.c @@ -0,0 +1,39 @@ +#include +#include +#include +#include +#include +#include "helper.h" + +jmp_buf jmp_env; + +static void sig_sigill(int sig) +{ + if (sig != SIGILL) { + check("Wrong signal received", false); + } + longjmp(jmp_env, 1); +} + +#define CHECK_SIGILL(STATEMENT) \ +do { \ + struct sigaction act; \ + \ + act.sa_handler = sig_sigill; \ + act.sa_flags = 0; \ + if (sigaction(SIGILL, &act, NULL)) { \ + check("SIGILL handler not registered", false); \ + } \ + \ + if (setjmp(jmp_env) == 0) { \ + STATEMENT; \ + check("SIGILL not triggered", false); \ + } \ + \ + act.sa_handler = SIG_DFL; \ + sigemptyset(&act.sa_mask); \ + act.sa_flags = 0; \ + if (sigaction(SIGILL, &act, NULL)) { \ + check("SIGILL handler not unregistered", false); \ + } \ +} while (0) diff --git a/tests/tcg/s390x/vlgv.c b/tests/tcg/s390x/vlgv.c new file mode 100644 index 0000000000..3c37ee2035 --- /dev/null +++ b/tests/tcg/s390x/vlgv.c @@ -0,0 +1,37 @@ +#include +#include +#include "signal_helper.inc.c" + +static inline void vlgv(uint64_t *r1, S390Vector *v3, const void *a2, + uint8_t m4) +{ + asm volatile("vlgv %[r1], %[v3], 0(%[a2]), %[m4]\n" + : [r1] "+d" (*r1), + [v3] "+v" (v3->v) + : [a2] "d" (a2), + [m4] "i" (m4)); +} + +int main(void) +{ + S390Vector v3 = { + .q[0] = 0x0011223344556677ull, + .q[1] = 0x8899aabbccddeeffull, + }; + uint64_t r1 = 0; + + /* Directly set all ignored bits to */ + vlgv(&r1, &v3, (void *)(7 | ~0xf), ES_8); + check("8 bit", r1 == 0x77); + vlgv(&r1, &v3, (void *)(4 | ~0x7), ES_16); + check("16 bit", r1 == 0x8899); + vlgv(&r1, &v3, (void *)(3 | ~0x3), ES_32); + check("32 bit", r1 == 0xccddeeff); + vlgv(&r1, &v3, (void *)(1 | ~0x1), ES_64); + check("64 bit", r1 == 0x8899aabbccddeeffull); + check("v3 not modified", v3.q[0] == 0x0011223344556677ull && + v3.q[1] == 0x8899aabbccddeeffull); + + CHECK_SIGILL(vlgv(&r1, &v3, NULL, ES_128)); + return 0; +} -- 2.17.2