From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46A8DC43381 for ; Thu, 28 Feb 2019 15:12:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 07F4A214D8 for ; Thu, 28 Feb 2019 15:12:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1551366772; bh=HLvJQdR5V65rXWbGfLOQovWFOtmNGczBGAV5ZMRohFA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=M9aUbaVFIr8Ph+76ij7dNkgKusyr1HDRh7Ye5Mny0Hnt6yC7RFm0AqZ1DIP2y02oD yYMQtPAscMAGgPY0KbRTnLxytygUqDi8jEAH+TQ9HRdg8RC9NEuOfpsfBsglof7dkt z0bgey0DeOUteyhJu+VPXYJFlh4gmVVLZBDU6WLc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388256AbfB1PMY (ORCPT ); Thu, 28 Feb 2019 10:12:24 -0500 Received: from mail.kernel.org ([198.145.29.99]:45782 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388227AbfB1PMU (ORCPT ); Thu, 28 Feb 2019 10:12:20 -0500 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id F2767218FC; Thu, 28 Feb 2019 15:12:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1551366739; bh=HLvJQdR5V65rXWbGfLOQovWFOtmNGczBGAV5ZMRohFA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GRM12CaimWD/9ZGStu4S9NEwNwsLtk1ER1Yo/3M52ZqWzIfI1dOd+cDkq7wwKquEl t6jEATs/JfD8GGNFKC/ObXleHFJqtuOUFeP/ImX1ArN7DfPwDwqWI7DWND+zqxcFk+ JsvqjXxWEuOv5S8n7hSX65IJbFBmjoQb89KkciLE= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Paul Kocialkowski , Maxime Ripard , Sasha Levin , dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 4.19 39/64] drm/sun4i: tcon: Prepare and enable TCON channel 0 clock at init Date: Thu, 28 Feb 2019 10:10:40 -0500 Message-Id: <20190228151105.11277-39-sashal@kernel.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190228151105.11277-1-sashal@kernel.org> References: <20190228151105.11277-1-sashal@kernel.org> MIME-Version: 1.0 X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Paul Kocialkowski [ Upstream commit b14e945bda8ae227d1bf2b1837c0c4a61721cd1a ] When initializing clocks, a reference to the TCON channel 0 clock is obtained. However, the clock is never prepared and enabled later. Switching from simplefb to DRM actually disables the clock (that was usually configured by U-Boot) because of that. On the V3s, this results in a hang when writing to some mixer registers when switching over to DRM from simplefb. Fix this by preparing and enabling the clock when initializing other clocks. Waiting for sun4i_tcon_channel_enable to enable the clock is apparently too late and results in the same mixer register access hang. Signed-off-by: Paul Kocialkowski Signed-off-by: Maxime Ripard Link: https://patchwork.freedesktop.org/patch/msgid/20190131132550.26355-1-paul.kocialkowski@bootlin.com Signed-off-by: Sasha Levin --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 3fb084f802e29..8c31c9ab06f8b 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -672,6 +672,7 @@ static int sun4i_tcon_init_clocks(struct device *dev, return PTR_ERR(tcon->sclk0); } } + clk_prepare_enable(tcon->sclk0); if (tcon->quirks->has_channel_1) { tcon->sclk1 = devm_clk_get(dev, "tcon-ch1"); @@ -686,6 +687,7 @@ static int sun4i_tcon_init_clocks(struct device *dev, static void sun4i_tcon_free_clocks(struct sun4i_tcon *tcon) { + clk_disable_unprepare(tcon->sclk0); clk_disable_unprepare(tcon->clk); } -- 2.19.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sasha Levin Subject: [PATCH AUTOSEL 4.19 39/64] drm/sun4i: tcon: Prepare and enable TCON channel 0 clock at init Date: Thu, 28 Feb 2019 10:10:40 -0500 Message-ID: <20190228151105.11277-39-sashal@kernel.org> References: <20190228151105.11277-1-sashal@kernel.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id C235788344 for ; Thu, 28 Feb 2019 15:12:19 +0000 (UTC) In-Reply-To: <20190228151105.11277-1-sashal@kernel.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Paul Kocialkowski , Maxime Ripard , dri-devel@lists.freedesktop.org, Sasha Levin List-Id: dri-devel@lists.freedesktop.org RnJvbTogUGF1bCBLb2NpYWxrb3dza2kgPHBhdWwua29jaWFsa293c2tpQGJvb3RsaW4uY29tPgoK WyBVcHN0cmVhbSBjb21taXQgYjE0ZTk0NWJkYThhZTIyN2QxYmYyYjE4MzdjMGM0YTYxNzIxY2Qx YSBdCgpXaGVuIGluaXRpYWxpemluZyBjbG9ja3MsIGEgcmVmZXJlbmNlIHRvIHRoZSBUQ09OIGNo YW5uZWwgMCBjbG9jayBpcwpvYnRhaW5lZC4gSG93ZXZlciwgdGhlIGNsb2NrIGlzIG5ldmVyIHBy ZXBhcmVkIGFuZCBlbmFibGVkIGxhdGVyLgpTd2l0Y2hpbmcgZnJvbSBzaW1wbGVmYiB0byBEUk0g YWN0dWFsbHkgZGlzYWJsZXMgdGhlIGNsb2NrICh0aGF0IHdhcwp1c3VhbGx5IGNvbmZpZ3VyZWQg YnkgVS1Cb290KSBiZWNhdXNlIG9mIHRoYXQuCgpPbiB0aGUgVjNzLCB0aGlzIHJlc3VsdHMgaW4g YSBoYW5nIHdoZW4gd3JpdGluZyB0byBzb21lIG1peGVyIHJlZ2lzdGVycwp3aGVuIHN3aXRjaGlu ZyBvdmVyIHRvIERSTSBmcm9tIHNpbXBsZWZiLgoKRml4IHRoaXMgYnkgcHJlcGFyaW5nIGFuZCBl bmFibGluZyB0aGUgY2xvY2sgd2hlbiBpbml0aWFsaXppbmcgb3RoZXIKY2xvY2tzLiBXYWl0aW5n IGZvciBzdW40aV90Y29uX2NoYW5uZWxfZW5hYmxlIHRvIGVuYWJsZSB0aGUgY2xvY2sgaXMKYXBw YXJlbnRseSB0b28gbGF0ZSBhbmQgcmVzdWx0cyBpbiB0aGUgc2FtZSBtaXhlciByZWdpc3RlciBh Y2Nlc3MgaGFuZy4KClNpZ25lZC1vZmYtYnk6IFBhdWwgS29jaWFsa293c2tpIDxwYXVsLmtvY2lh bGtvd3NraUBib290bGluLmNvbT4KU2lnbmVkLW9mZi1ieTogTWF4aW1lIFJpcGFyZCA8bWF4aW1l LnJpcGFyZEBib290bGluLmNvbT4KTGluazogaHR0cHM6Ly9wYXRjaHdvcmsuZnJlZWRlc2t0b3Au b3JnL3BhdGNoL21zZ2lkLzIwMTkwMTMxMTMyNTUwLjI2MzU1LTEtcGF1bC5rb2NpYWxrb3dza2lA Ym9vdGxpbi5jb20KU2lnbmVkLW9mZi1ieTogU2FzaGEgTGV2aW4gPHNhc2hhbEBrZXJuZWwub3Jn PgotLS0KIGRyaXZlcnMvZ3B1L2RybS9zdW40aS9zdW40aV90Y29uLmMgfCAyICsrCiAxIGZpbGUg Y2hhbmdlZCwgMiBpbnNlcnRpb25zKCspCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL3N1 bjRpL3N1bjRpX3Rjb24uYyBiL2RyaXZlcnMvZ3B1L2RybS9zdW40aS9zdW40aV90Y29uLmMKaW5k ZXggM2ZiMDg0ZjgwMmUyOS4uOGMzMWM5YWIwNmY4YiAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUv ZHJtL3N1bjRpL3N1bjRpX3Rjb24uYworKysgYi9kcml2ZXJzL2dwdS9kcm0vc3VuNGkvc3VuNGlf dGNvbi5jCkBAIC02NzIsNiArNjcyLDcgQEAgc3RhdGljIGludCBzdW40aV90Y29uX2luaXRfY2xv Y2tzKHN0cnVjdCBkZXZpY2UgKmRldiwKIAkJCXJldHVybiBQVFJfRVJSKHRjb24tPnNjbGswKTsK IAkJfQogCX0KKwljbGtfcHJlcGFyZV9lbmFibGUodGNvbi0+c2NsazApOwogCiAJaWYgKHRjb24t PnF1aXJrcy0+aGFzX2NoYW5uZWxfMSkgewogCQl0Y29uLT5zY2xrMSA9IGRldm1fY2xrX2dldChk ZXYsICJ0Y29uLWNoMSIpOwpAQCAtNjg2LDYgKzY4Nyw3IEBAIHN0YXRpYyBpbnQgc3VuNGlfdGNv bl9pbml0X2Nsb2NrcyhzdHJ1Y3QgZGV2aWNlICpkZXYsCiAKIHN0YXRpYyB2b2lkIHN1bjRpX3Rj b25fZnJlZV9jbG9ja3Moc3RydWN0IHN1bjRpX3Rjb24gKnRjb24pCiB7CisJY2xrX2Rpc2FibGVf dW5wcmVwYXJlKHRjb24tPnNjbGswKTsKIAljbGtfZGlzYWJsZV91bnByZXBhcmUodGNvbi0+Y2xr KTsKIH0KIAotLSAKMi4xOS4xCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVz a3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9k cmktZGV2ZWw=