From mboxrd@z Thu Jan 1 00:00:00 1970 From: tien.fong.chee at intel.com Date: Wed, 6 Mar 2019 00:23:10 +0800 Subject: [U-Boot] [PATCH v11 9/9] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL In-Reply-To: <20190305162310.1396-1-tien.fong.chee@intel.com> References: <20190305162310.1396-1-tien.fong.chee@intel.com> Message-ID: <20190305162310.1396-10-tien.fong.chee@intel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Tien Fong Chee After some series of patches to maximise reusable of memory pool, here come to result of reasonable size required for whole SDMMC boot working on A10 SoCDK. Size required come from default max cluster(0x10000) + others(0x2000) + additional memory for headroom(0x3000). Signed-off-by: Tien Fong Chee --- changes for v7 - Added 0x3000 for memory headroom. --- include/configs/socfpga_common.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 4551cb29bc..548b458e78 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2012 Altera Corporation + * Copyright (C) 2012-2019 Altera Corporation */ #ifndef __CONFIG_SOCFPGA_COMMON_H__ #define __CONFIG_SOCFPGA_COMMON_H__ @@ -258,7 +258,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) /* SPL memory allocation configuration, this is for FAT implementation */ #ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00015000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \ CONFIG_SYS_SPL_MALLOC_SIZE + \ CONFIG_SYS_INIT_RAM_ADDR) -- 2.13.0