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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 1/5] drm/i915/icl: split combo and mg pll enable
Date: Tue,  5 Mar 2019 17:26:32 -0800	[thread overview]
Message-ID: <20190306012636.18619-2-lucas.demarchi@intel.com> (raw)
In-Reply-To: <20190306012636.18619-1-lucas.demarchi@intel.com>

Let's start using the vfuncs to differentiate MG and Combo PLLs. The end
goal is to decouple the type of the PLL from the IDs since the latter
are likely to change from one platform to another. This also makes the
code easier to read by not having lots of if/else chains on leaf
functions.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/intel_dpll_mgr.c | 25 +++++++++++++++++++++----
 1 file changed, 21 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index e4ec73d415d9..3b3de99756d6 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -3117,10 +3117,10 @@ static void icl_mg_pll_write(struct drm_i915_private *dev_priv,
 }
 
 static void icl_pll_enable(struct drm_i915_private *dev_priv,
-			   struct intel_shared_dpll *pll)
+			   struct intel_shared_dpll *pll,
+			   i915_reg_t enable_reg)
 {
 	const enum intel_dpll_id id = pll->info->id;
-	i915_reg_t enable_reg = icl_pll_id_to_enable_reg(id);
 	u32 val;
 
 	val = I915_READ(enable_reg);
@@ -3157,6 +3157,23 @@ static void icl_pll_enable(struct drm_i915_private *dev_priv,
 	/* DVFS post sequence would be here. See the comment above. */
 }
 
+static void combo_pll_enable(struct drm_i915_private *dev_priv,
+			     struct intel_shared_dpll *pll)
+{
+	i915_reg_t enable_reg = icl_pll_id_to_enable_reg(pll->info->id);
+
+	icl_pll_enable(dev_priv, pll, enable_reg);
+}
+
+static void mg_pll_enable(struct drm_i915_private *dev_priv,
+			  struct intel_shared_dpll *pll)
+{
+	i915_reg_t enable_reg =
+		MG_PLL_ENABLE(icl_pll_id_to_tc_port(pll->info->id));
+
+	icl_pll_enable(dev_priv, pll, enable_reg);
+}
+
 static void icl_pll_disable(struct drm_i915_private *dev_priv,
 			    struct intel_shared_dpll *pll)
 {
@@ -3218,13 +3235,13 @@ static void icl_dump_hw_state(struct drm_i915_private *dev_priv,
 }
 
 static const struct intel_shared_dpll_funcs icl_pll_funcs = {
-	.enable = icl_pll_enable,
+	.enable = combo_pll_enable,
 	.disable = icl_pll_disable,
 	.get_hw_state = icl_pll_get_hw_state,
 };
 
 static const struct intel_shared_dpll_funcs mg_pll_funcs = {
-	.enable = icl_pll_enable,
+	.enable = mg_pll_enable,
 	.disable = icl_pll_disable,
 	.get_hw_state = mg_pll_get_hw_state,
 };
-- 
2.20.1

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  reply	other threads:[~2019-03-06  1:26 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-06  1:26 [PATCH 0/5] drm/i915/icl: split pll functions Lucas De Marchi
2019-03-06  1:26 ` Lucas De Marchi [this message]
2019-03-06  1:26 ` [PATCH 2/5] drm/i915/icl: use a function pointer for pll_write when enabling Lucas De Marchi
2019-03-08 20:19   ` Ville Syrjälä
2019-03-06  1:26 ` [PATCH 3/5] drm/i915/icl: split combo and mg pll disable Lucas De Marchi
2019-03-06  1:26 ` [PATCH 4/5] drm/i915/icl: split combo and tbt pll funcs Lucas De Marchi
2019-03-06  1:26 ` [PATCH 5/5] drm/i915/icl: remove intel_dpll_is_combophy() Lucas De Marchi
2019-03-06  1:54 ` ✓ Fi.CI.BAT: success for drm/i915/icl: split pll functions Patchwork
2019-03-06  9:16 ` ✓ Fi.CI.IGT: " Patchwork

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