From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:49450) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h1uDG-0006ix-BH for qemu-devel@nongnu.org; Thu, 07 Mar 2019 09:41:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h1uDF-0003T2-CE for qemu-devel@nongnu.org; Thu, 07 Mar 2019 09:41:34 -0500 Received: from mail-pg1-x541.google.com ([2607:f8b0:4864:20::541]:36065) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1h1uDF-0003SU-5S for qemu-devel@nongnu.org; Thu, 07 Mar 2019 09:41:33 -0500 Received: by mail-pg1-x541.google.com with SMTP id r124so11423539pgr.3 for ; Thu, 07 Mar 2019 06:41:33 -0800 (PST) From: Richard Henderson Date: Thu, 7 Mar 2019 06:41:20 -0800 Message-Id: <20190307144126.31847-4-richard.henderson@linaro.org> In-Reply-To: <20190307144126.31847-1-richard.henderson@linaro.org> References: <20190307144126.31847-1-richard.henderson@linaro.org> Subject: [Qemu-devel] [PATCH 3/9] tcg: Use extract2 in tcg_gen_shifti_i64 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: david@redhat.com Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 47 ++++++++++++++++++++++++----------------------- 1 file changed, 24 insertions(+), 23 deletions(-) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index deacc63e3b..34e0dbc6e0 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -1355,31 +1355,32 @@ static inline void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1, tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c); tcg_gen_movi_i32(TCGV_LOW(ret), 0); } - } else { - TCGv_i32 t0, t1; - - t0 = tcg_temp_new_i32(); - t1 = tcg_temp_new_i32(); - if (right) { - tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c); - if (arith) { - tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c); - } else { - tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c); - } - tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c); - tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0); - tcg_gen_mov_i32(TCGV_HIGH(ret), t1); + } else if (right) { + if (TCG_TARGET_HAS_extract2_i32) { + tcg_gen_extract2_i32(TCGV_LOW(ret), TCGV_LOW(arg1), + TCGV_HIGH(arg1), c); } else { - tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c); - /* Note: ret can be the same as arg1, so we use t1 */ - tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c); - tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c); - tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0); - tcg_gen_mov_i32(TCGV_LOW(ret), t1); + tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c); + tcg_gen_deposit_i32(TCGV_LOW(ret), TCGV_LOW(ret), + TCGV_HIGH(arg1), 32 - c, c); } - tcg_temp_free_i32(t0); - tcg_temp_free_i32(t1); + if (arith) { + tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c); + } else { + tcg_gen_shri_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c); + } + } else { + if (TCG_TARGET_HAS_extract2_i32) { + tcg_gen_extract2_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), + TCGV_HIGH(arg1), 32 - c); + } else { + TCGv_i32 t0 = tcg_temp_new_i32(); + tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c); + tcg_gen_deposit_i32(TCGV_HIGH(ret), t0, + TCGV_HIGH(arg1), c, 32 - c); + tcg_temp_free_i32(t0); + } + tcg_gen_shli_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c); } } -- 2.17.2