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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH v4 10/22] target/arm: Define arm_cpu_do_unaligned_access for CONFIG_USER_ONLY
Date: Thu,  7 Mar 2019 09:04:28 -0800	[thread overview]
Message-ID: <20190307170440.3113-11-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190307170440.3113-1-richard.henderson@linaro.org>

We will need this to raise unaligned exceptions from user mode.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/op_helper.c | 33 ++++++++++++++++-----------------
 1 file changed, 16 insertions(+), 17 deletions(-)

diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index 8698b4dc83..d3cf362e4b 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -87,8 +87,6 @@ uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def, void *vn,
     return val;
 }
 
-#if !defined(CONFIG_USER_ONLY)
-
 static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
                                             unsigned int target_el,
                                             bool same_el, bool ea,
@@ -179,6 +177,22 @@ static void deliver_fault(ARMCPU *cpu, vaddr addr, MMUAccessType access_type,
     raise_exception(env, exc, syn, target_el);
 }
 
+/* Raise a data fault alignment exception for the specified virtual address */
+void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
+                                 MMUAccessType access_type,
+                                 int mmu_idx, uintptr_t retaddr)
+{
+    ARMCPU *cpu = ARM_CPU(cs);
+    ARMMMUFaultInfo fi = {};
+
+    /* now we have a real cpu fault */
+    cpu_restore_state(cs, retaddr, true);
+
+    fi.type = ARMFault_Alignment;
+    deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);
+}
+
+#ifndef CONFIG_USER_ONLY
 /* try to fill the TLB and return an exception if error. If retaddr is
  * NULL, it means that the function was called in C code (i.e. not
  * from generated code or from helper.c)
@@ -200,21 +214,6 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size,
     }
 }
 
-/* Raise a data fault alignment exception for the specified virtual address */
-void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
-                                 MMUAccessType access_type,
-                                 int mmu_idx, uintptr_t retaddr)
-{
-    ARMCPU *cpu = ARM_CPU(cs);
-    ARMMMUFaultInfo fi = {};
-
-    /* now we have a real cpu fault */
-    cpu_restore_state(cs, retaddr, true);
-
-    fi.type = ARMFault_Alignment;
-    deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);
-}
-
 /* arm_cpu_do_transaction_failed: handle a memory system error response
  * (eg "no device/memory present at address") by raising an external abort
  * exception
-- 
2.17.2

  parent reply	other threads:[~2019-03-07 17:06 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-07 17:04 [Qemu-devel] [PATCH v4 00/22] target/arm: Implement ARMv8.5-MemTag, system mode Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 01/22] target/arm: Add MTE_ACTIVE to tb_flags Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 02/22] target/arm: Extract TCMA with ARMVAParameters Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 03/22] target/arm: Add MTE system registers Richard Henderson
2019-03-08 10:31   ` Laurent Desnogues
2019-03-08 10:37     ` Laurent Desnogues
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 04/22] target/arm: Add helper_mte_check{1, 2} Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 05/22] target/arm: Suppress tag check for sp+offset Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 06/22] target/arm: Implement the IRG instruction Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 07/22] target/arm: Implement ADDG, SUBG instructions Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 08/22] target/arm: Implement the GMI instruction Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 09/22] target/arm: Implement the SUBP instruction Richard Henderson
2019-03-07 17:04 ` Richard Henderson [this message]
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 11/22] target/arm: Implement LDG, STG, ST2G instructions Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 12/22] target/arm: Implement the STGP instruction Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 13/22] target/arm: Implement the LDGM and STGM instructions Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 14/22] target/arm: Implement the access tag cache flushes Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 15/22] target/arm: Clean address for DC ZVA Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 16/22] target/arm: Implement data cache set allocation tags Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 17/22] target/arm: Set PSTATE.TCO on exception entry Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 18/22] target/arm: Cache the Tagged bit for a page in MemTxAttrs Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 19/22] target/arm: Create tagged ram when MTE is enabled Richard Henderson
2019-07-22 16:03   ` Peter Maydell
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 20/22] target/arm: Create a TLB entry for tag physical address space Richard Henderson
2019-07-19 15:48   ` Peter Maydell
2019-07-19 21:31     ` Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 21/22] target/arm: Add allocation tag storage for system mode Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 22/22] target/arm: Enable MTE Richard Henderson
2019-03-07 17:35 ` [Qemu-devel] [PATCH v4 00/22] target/arm: Implement ARMv8.5-MemTag, system mode no-reply
2019-03-08 18:40 ` no-reply

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