From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (146.0.238.70:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 07 Mar 2019 23:59:25 -0000 Received: from mga09.intel.com ([134.134.136.24]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1h22v5-0004P4-2n for speck@linutronix.de; Fri, 08 Mar 2019 00:59:23 +0100 Date: Thu, 7 Mar 2019 15:59:21 -0800 From: Andi Kleen Subject: [MODERATED] Re: [patch V6 05/14] MDS basics 5 Message-ID: <20190307235921.GG7535@tassilo.jf.intel.com> References: <20190301214738.281554861@linutronix.de> <20190301214847.627745697@linutronix.de> MIME-Version: 1.0 In-Reply-To: <20190301214847.627745697@linutronix.de> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Fri, Mar 01, 2019 at 10:47:43PM +0100, speck for Thomas Gleixner wrote: > From: Andi Kleen > Subject: [patch V6 05/14] x86/kvm: Expose X86_FEATURE_MD_CLEAR to guests > > X86_FEATURE_MD_CLEAR is a new CPUID bit which is set when microcode > provides the mechanism to invoke a flush of various exploitable CPU buffers > by invoking the VERW instruction. > > Hand it through to guests so they can adjust their mitigations. > > This also requires corresponding qemu changes, which are available > separately. This patch is not complete. You also need some variant of x86/speculation/mds: Handle VMENTRY clear for CPUs without l1tf in my patch kit. -Andi