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* [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME
@ 2019-03-08  0:00 José Roberto de Souza
  2019-03-08  0:00 ` [PATCH v6 2/9] drm/i915/psr: Only lookup for enabled CRTCs when forcing a fastset José Roberto de Souza
                   ` (10 more replies)
  0 siblings, 11 replies; 14+ messages in thread
From: José Roberto de Souza @ 2019-03-08  0:00 UTC (permalink / raw)
  To: intel-gfx; +Cc: Dhinakaran Pandiyan

Now we are checking sink capabilities when probing PSR DPCD register
and then dynamically checking in if new state is compatible with PSR
in, so this FIXME can be dropped.

Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 75c1a5deebf5..8bed73914876 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -532,11 +532,6 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 	int crtc_vdisplay = crtc_state->base.adjusted_mode.crtc_vdisplay;
 	int psr_max_h = 0, psr_max_v = 0;
 
-	/*
-	 * FIXME psr2_support is messed up. It's both computed
-	 * dynamically during PSR enable, and extracted from sink
-	 * caps during eDP detection.
-	 */
 	if (!dev_priv->psr.sink_psr2_support)
 		return false;
 
-- 
2.21.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v6 2/9] drm/i915/psr: Only lookup for enabled CRTCs when forcing a fastset
  2019-03-08  0:00 [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
@ 2019-03-08  0:00 ` José Roberto de Souza
  2019-03-08  0:00 ` [PATCH v6 3/9] drm/i915: Compute and commit color features in fastsets José Roberto de Souza
                   ` (9 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: José Roberto de Souza @ 2019-03-08  0:00 UTC (permalink / raw)
  To: intel-gfx; +Cc: Dhinakaran Pandiyan

Forcing a specific CRTC to the eDP connector was causing the
intel_psr_fastset_force() to mark mode_chaged in the wrong and
disabled CRTC causing no update in the PSR state.

Looks like our internal state track do not clear output_types and
has_psr in the disabled CRTCs, not sure if this is the expected
behavior or not but in the mean time this fix the issue.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 8bed73914876..6175b1d2e0c8 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -981,7 +981,8 @@ static int intel_psr_fastset_force(struct drm_i915_private *dev_priv)
 
 		intel_crtc_state = to_intel_crtc_state(crtc_state);
 
-		if (intel_crtc_has_type(intel_crtc_state, INTEL_OUTPUT_EDP) &&
+		if (crtc_state->active &&
+		    intel_crtc_has_type(intel_crtc_state, INTEL_OUTPUT_EDP) &&
 		    intel_crtc_state->has_psr) {
 			/* Mark mode as changed to trigger a pipe->update() */
 			crtc_state->mode_changed = true;
-- 
2.21.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v6 3/9] drm/i915: Compute and commit color features in fastsets
  2019-03-08  0:00 [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
  2019-03-08  0:00 ` [PATCH v6 2/9] drm/i915/psr: Only lookup for enabled CRTCs when forcing a fastset José Roberto de Souza
@ 2019-03-08  0:00 ` José Roberto de Souza
  2019-03-08  0:00 ` [PATCH v6 4/9] drm/i915/psr: Drop test for EDP in CRTC when forcing commit José Roberto de Souza
                   ` (8 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: José Roberto de Souza @ 2019-03-08  0:00 UTC (permalink / raw)
  To: intel-gfx

In any commit, intel_modeset_pipe_config() will initialilly clear
and then recalculate most of the pipe states but it leave intel
specific color features states in reset state.

If after intel_pipe_config_compare() is detected that a fastset is
possible it will mark update_pipe as true and unsed mode_changed,
causing the color features state to be kept in reset state and then
latter being committed to hardware disabling the color features.

This issue can be reproduced by any code patch that duplicates the
actual(with color features already enabled) state and only mark
mode_changed as true.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 380ba573423e..e3ca025df7e2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11247,7 +11247,8 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
 			return ret;
 	}
 
-	if (mode_changed || crtc_state->color_mgmt_changed) {
+	if (mode_changed || pipe_config->update_pipe ||
+	    crtc_state->color_mgmt_changed) {
 		ret = intel_color_check(pipe_config);
 		if (ret)
 			return ret;
-- 
2.21.0

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^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v6 4/9] drm/i915/psr: Drop test for EDP in CRTC when forcing commit
  2019-03-08  0:00 [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
  2019-03-08  0:00 ` [PATCH v6 2/9] drm/i915/psr: Only lookup for enabled CRTCs when forcing a fastset José Roberto de Souza
  2019-03-08  0:00 ` [PATCH v6 3/9] drm/i915: Compute and commit color features in fastsets José Roberto de Souza
@ 2019-03-08  0:00 ` José Roberto de Souza
  2019-03-08  0:00 ` [PATCH v6 5/9] drm/i915/crc: Make IPS workaround generic José Roberto de Souza
                   ` (7 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: José Roberto de Souza @ 2019-03-08  0:00 UTC (permalink / raw)
  To: intel-gfx; +Cc: Dhinakaran Pandiyan

If has_psr is set it means that CRTC has a EDP panel attached so the
EDP check is redundant and can be dropped.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 6175b1d2e0c8..2d9f64c362e2 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -981,9 +981,7 @@ static int intel_psr_fastset_force(struct drm_i915_private *dev_priv)
 
 		intel_crtc_state = to_intel_crtc_state(crtc_state);
 
-		if (crtc_state->active &&
-		    intel_crtc_has_type(intel_crtc_state, INTEL_OUTPUT_EDP) &&
-		    intel_crtc_state->has_psr) {
+		if (crtc_state->active && intel_crtc_state->has_psr) {
 			/* Mark mode as changed to trigger a pipe->update() */
 			crtc_state->mode_changed = true;
 			break;
-- 
2.21.0

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v6 5/9] drm/i915/crc: Make IPS workaround generic
  2019-03-08  0:00 [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
                   ` (2 preceding siblings ...)
  2019-03-08  0:00 ` [PATCH v6 4/9] drm/i915/psr: Drop test for EDP in CRTC when forcing commit José Roberto de Souza
@ 2019-03-08  0:00 ` José Roberto de Souza
  2019-03-08  0:00 ` [PATCH v6 6/9] drm/i915: Disable PSR2 while getting pipe CRC José Roberto de Souza
                   ` (6 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: José Roberto de Souza @ 2019-03-08  0:00 UTC (permalink / raw)
  To: intel-gfx; +Cc: Dhinakaran Pandiyan

Other features like PSR2 also needs to be disabled while getting CRC
so lets rename ips_force_disable to crc_enabled, drop all this checks
for pipe A and HSW and BDW and make it generic and
hsw_compute_ips_config() will take care of all the checks removed
from here.

v2: Renaming and parameter changes to the functions that prepares the
commit (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c  | 10 ++++--
 drivers/gpu/drm/i915/intel_drv.h      |  3 +-
 drivers/gpu/drm/i915/intel_pipe_crc.c | 50 +++++++++++----------------
 3 files changed, 30 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e3ca025df7e2..963b4bd69dbb 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6759,7 +6759,13 @@ static bool hsw_compute_ips_config(struct intel_crtc_state *crtc_state)
 	if (!hsw_crtc_state_ips_capable(crtc_state))
 		return false;
 
-	if (crtc_state->ips_force_disable)
+	/*
+	 * When IPS gets enabled, the pipe CRC changes. Since IPS gets
+	 * enabled and disabled dynamically based on package C states,
+	 * user space can't make reliable use of the CRCs, so let's just
+	 * completely disable it.
+	 */
+	if (crtc_state->crc_enabled)
 		return false;
 
 	/* IPS should be fine as long as at least one plane is enabled. */
@@ -11699,7 +11705,7 @@ clear_intel_crtc_state(struct intel_crtc_state *crtc_state)
 	saved_state->shared_dpll = crtc_state->shared_dpll;
 	saved_state->dpll_hw_state = crtc_state->dpll_hw_state;
 	saved_state->pch_pfit.force_thru = crtc_state->pch_pfit.force_thru;
-	saved_state->ips_force_disable = crtc_state->ips_force_disable;
+	saved_state->crc_enabled = crtc_state->crc_enabled;
 	if (IS_G4X(dev_priv) ||
 	    IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
 		saved_state->wm = crtc_state->wm;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 58483f8245aa..40ebc94b2187 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -999,7 +999,8 @@ struct intel_crtc_state {
 	struct intel_link_m_n fdi_m_n;
 
 	bool ips_enabled;
-	bool ips_force_disable;
+
+	bool crc_enabled;
 
 	bool enable_fbc;
 
diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
index 53d4ec68d3c4..d9ecab8c5c63 100644
--- a/drivers/gpu/drm/i915/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
@@ -280,19 +280,18 @@ static int ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,
 	return 0;
 }
 
-static void hsw_pipe_A_crc_wa(struct drm_i915_private *dev_priv,
-			      bool enable)
+static void
+intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable)
 {
-	struct drm_device *dev = &dev_priv->drm;
-	struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	struct intel_crtc_state *pipe_config;
 	struct drm_atomic_state *state;
 	struct drm_modeset_acquire_ctx ctx;
-	int ret = 0;
+	int ret;
 
 	drm_modeset_acquire_init(&ctx, 0);
 
-	state = drm_atomic_state_alloc(dev);
+	state = drm_atomic_state_alloc(&dev_priv->drm);
 	if (!state) {
 		ret = -ENOMEM;
 		goto unlock;
@@ -307,17 +306,9 @@ static void hsw_pipe_A_crc_wa(struct drm_i915_private *dev_priv,
 		goto put_state;
 	}
 
-	if (HAS_IPS(dev_priv)) {
-		/*
-		 * When IPS gets enabled, the pipe CRC changes. Since IPS gets
-		 * enabled and disabled dynamically based on package C states,
-		 * user space can't make reliable use of the CRCs, so let's just
-		 * completely disable it.
-		 */
-		pipe_config->ips_force_disable = enable;
-	}
+	pipe_config->crc_enabled = enable;
 
-	if (IS_HASWELL(dev_priv)) {
+	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A) {
 		pipe_config->pch_pfit.force_thru = enable;
 		if (pipe_config->cpu_transcoder == TRANSCODER_EDP &&
 		    pipe_config->pch_pfit.enabled != enable)
@@ -343,8 +334,7 @@ static void hsw_pipe_A_crc_wa(struct drm_i915_private *dev_priv,
 static int ivb_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
 				enum pipe pipe,
 				enum intel_pipe_crc_source *source,
-				u32 *val,
-				bool set_wa)
+				u32 *val)
 {
 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)
 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;
@@ -357,10 +347,6 @@ static int ivb_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
 		*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_SPRITE_IVB;
 		break;
 	case INTEL_PIPE_CRC_SOURCE_PIPE:
-		if (set_wa && (IS_HASWELL(dev_priv) ||
-		     IS_BROADWELL(dev_priv)) && pipe == PIPE_A)
-			hsw_pipe_A_crc_wa(dev_priv, true);
-
 		*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PF_IVB;
 		break;
 	case INTEL_PIPE_CRC_SOURCE_NONE:
@@ -418,8 +404,7 @@ static int skl_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
 
 static int get_new_crc_ctl_reg(struct drm_i915_private *dev_priv,
 			       enum pipe pipe,
-			       enum intel_pipe_crc_source *source, u32 *val,
-			       bool set_wa)
+			       enum intel_pipe_crc_source *source, u32 *val)
 {
 	if (IS_GEN(dev_priv, 2))
 		return i8xx_pipe_crc_ctl_reg(source, val);
@@ -430,7 +415,7 @@ static int get_new_crc_ctl_reg(struct drm_i915_private *dev_priv,
 	else if (IS_GEN_RANGE(dev_priv, 5, 6))
 		return ilk_pipe_crc_ctl_reg(source, val);
 	else if (INTEL_GEN(dev_priv) < 9)
-		return ivb_pipe_crc_ctl_reg(dev_priv, pipe, source, val, set_wa);
+		return ivb_pipe_crc_ctl_reg(dev_priv, pipe, source, val);
 	else
 		return skl_pipe_crc_ctl_reg(dev_priv, pipe, source, val);
 }
@@ -605,6 +590,7 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name)
 	intel_wakeref_t wakeref;
 	u32 val = 0; /* shut up gcc */
 	int ret = 0;
+	bool enable;
 
 	if (display_crc_ctl_parse_source(source_name, &source) < 0) {
 		DRM_DEBUG_DRIVER("unknown source %s\n", source_name);
@@ -618,7 +604,11 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name)
 		return -EIO;
 	}
 
-	ret = get_new_crc_ctl_reg(dev_priv, crtc->index, &source, &val, true);
+	enable = source != INTEL_PIPE_CRC_SOURCE_NONE;
+	if (enable)
+		intel_crtc_crc_setup_workarounds(to_intel_crtc(crtc), true);
+
+	ret = get_new_crc_ctl_reg(dev_priv, crtc->index, &source, &val);
 	if (ret != 0)
 		goto out;
 
@@ -629,14 +619,14 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name)
 	if (!source) {
 		if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
 			vlv_undo_pipe_scramble_reset(dev_priv, crtc->index);
-		else if ((IS_HASWELL(dev_priv) ||
-			  IS_BROADWELL(dev_priv)) && crtc->index == PIPE_A)
-			hsw_pipe_A_crc_wa(dev_priv, false);
 	}
 
 	pipe_crc->skipped = 0;
 
 out:
+	if (!enable)
+		intel_crtc_crc_setup_workarounds(to_intel_crtc(crtc), false);
+
 	intel_display_power_put(dev_priv, power_domain, wakeref);
 
 	return ret;
@@ -652,7 +642,7 @@ void intel_crtc_enable_pipe_crc(struct intel_crtc *intel_crtc)
 	if (!crtc->crc.opened)
 		return;
 
-	if (get_new_crc_ctl_reg(dev_priv, crtc->index, &pipe_crc->source, &val, false) < 0)
+	if (get_new_crc_ctl_reg(dev_priv, crtc->index, &pipe_crc->source, &val) < 0)
 		return;
 
 	/* Don't need pipe_crc->lock here, IRQs are not generated. */
-- 
2.21.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v6 6/9] drm/i915: Disable PSR2 while getting pipe CRC
  2019-03-08  0:00 [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
                   ` (3 preceding siblings ...)
  2019-03-08  0:00 ` [PATCH v6 5/9] drm/i915/crc: Make IPS workaround generic José Roberto de Souza
@ 2019-03-08  0:00 ` José Roberto de Souza
  2019-03-08  0:00 ` [PATCH v6 7/9] drm/i915: Drop redundant checks to update PSR state José Roberto de Souza
                   ` (5 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: José Roberto de Souza @ 2019-03-08  0:00 UTC (permalink / raw)
  To: intel-gfx; +Cc: Dhinakaran Pandiyan

When PSR2 is active aka after the number of frames programmed in
PSR2_CTL 'Frames Before SU Entry' hardware stops to generate CRC
interrupts causing IGT tests to fail due timeout.

This same behavior don't happen with PSR1, as soon as pipe CRC is
enabled it blocks PSR1 activation so CRC calculation continues to
happens normaly.

This patch also set mode_changed as true when PSR is available to
force atomic check functions to compute new PSR state, otherwise PSR2
would not be disabled.

v4: Only setting mode_changed if has_psr is set(Dhinakaran)

v3: Reusing intel_crtc_crc_prepare() and crc_enabled, only setting
mode_changed if it can do PSR.

v2: Changed commit description to describe that PSR2 inhibit CRC
calculations.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_pipe_crc.c | 1 +
 drivers/gpu/drm/i915/intel_psr.c      | 5 +++++
 2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
index d9ecab8c5c63..64a98712d61f 100644
--- a/drivers/gpu/drm/i915/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
@@ -306,6 +306,7 @@ intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable)
 		goto put_state;
 	}
 
+	pipe_config->base.mode_changed = pipe_config->has_psr;
 	pipe_config->crc_enabled = enable;
 
 	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A) {
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 2d9f64c362e2..25a0a77268a9 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -572,6 +572,11 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
+	if (crtc_state->crc_enabled) {
+		DRM_DEBUG_KMS("PSR2 not enabled because it would inhibit pipe CRC calculation\n");
+		return false;
+	}
+
 	return true;
 }
 
-- 
2.21.0

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^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v6 7/9] drm/i915: Drop redundant checks to update PSR state
  2019-03-08  0:00 [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
                   ` (4 preceding siblings ...)
  2019-03-08  0:00 ` [PATCH v6 6/9] drm/i915: Disable PSR2 while getting pipe CRC José Roberto de Souza
@ 2019-03-08  0:00 ` José Roberto de Souza
  2019-03-08  0:00 ` [PATCH v6 8/9] drm/i915: Force PSR1 exit when getting pipe CRC José Roberto de Souza
                   ` (4 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: José Roberto de Souza @ 2019-03-08  0:00 UTC (permalink / raw)
  To: intel-gfx; +Cc: Dhinakaran Pandiyan

All of this checks are redudant and can be removed as the if bellow
already takes care when there is no changes in the state.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 25a0a77268a9..9847f6b0cd9a 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -880,15 +880,11 @@ void intel_psr_update(struct intel_dp *intel_dp,
 	if (enable == psr->enabled && psr2_enable == psr->psr2_enabled)
 		goto unlock;
 
-	if (psr->enabled) {
-		if (!enable || psr2_enable != psr->psr2_enabled)
-			intel_psr_disable_locked(intel_dp);
-	}
+	if (psr->enabled)
+		intel_psr_disable_locked(intel_dp);
 
-	if (enable) {
-		if (!psr->enabled || psr2_enable != psr->psr2_enabled)
-			intel_psr_enable_locked(dev_priv, crtc_state);
-	}
+	if (enable)
+		intel_psr_enable_locked(dev_priv, crtc_state);
 
 unlock:
 	mutex_unlock(&dev_priv->psr.lock);
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v6 8/9] drm/i915: Force PSR1 exit when getting pipe CRC
  2019-03-08  0:00 [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
                   ` (5 preceding siblings ...)
  2019-03-08  0:00 ` [PATCH v6 7/9] drm/i915: Drop redundant checks to update PSR state José Roberto de Souza
@ 2019-03-08  0:00 ` José Roberto de Souza
  2019-03-08 18:44   ` Souza, Jose
  2019-03-08  0:00 ` [PATCH v6 9/9] drm/i915: Enable PSR2 by default José Roberto de Souza
                   ` (3 subsequent siblings)
  10 siblings, 1 reply; 14+ messages in thread
From: José Roberto de Souza @ 2019-03-08  0:00 UTC (permalink / raw)
  To: intel-gfx; +Cc: Dhinakaran Pandiyan

If PSR1 is active when pipe CRC is enabled the CRC calculations will
be inhibit by the transition to low power states that PSR1 brings.
So lets force a PSR1 exit and as soon as pipe CRC is enabled it will
block PSR1 activation and avoid CRC timeouts when running IGT tests.

There is a little window between the call to force exit PSR and the
write to pipe CRC registers that needs to happen within the minimum
of 6 idles frames otherwise PSR1 will be active again causing the CRC
timeouts but anyways this will at least reduce the occurrence of CRC
timeouts.

This can possibily fix issues present right now but I did not found
any open, I mostly got this issue from previous CI runs of this
series, bellow some exambles:

* igt@kms_color@pipe-b-ctm-0-75:
- shard-apl:          PASS -> FAIL +9

* igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy:
- shard-apl:          PASS -> DMESG-FAIL +17

* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
- shard-kbl:          PASS -> DMESG-FAIL +12

* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- shard-kbl:          PASS -> FAIL +7

v6: s/PSR/PSR1 (Dhinakaran)

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 36 ++++++++++++++++++++------------
 1 file changed, 23 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 9847f6b0cd9a..053dbba6abde 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -452,6 +452,7 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp)
 	 * frames, we'll go with 9 frames for now
 	 */
 	idle_frames = max(idle_frames, dev_priv->psr.sink_sync_latency + 1);
+
 	val |= idle_frames << EDP_PSR_IDLE_FRAME_SHIFT;
 
 	val |= max_sleep_time << EDP_PSR_MAX_SLEEP_TIME_SHIFT;
@@ -853,6 +854,20 @@ void intel_psr_disable(struct intel_dp *intel_dp,
 	cancel_work_sync(&dev_priv->psr.work);
 }
 
+static void psr_force_hw_tracking_exit(struct drm_i915_private *dev_priv)
+{
+	/*
+	 * Display WA #0884: all
+	 * This documented WA for bxt can be safely applied
+	 * broadly so we can force HW tracking to exit PSR
+	 * instead of disabling and re-enabling.
+	 * Workaround tells us to write 0 to CUR_SURFLIVE_A,
+	 * but it makes more sense write to the current active
+	 * pipe.
+	 */
+	I915_WRITE(CURSURFLIVE(dev_priv->psr.pipe), 0);
+}
+
 /**
  * intel_psr_update - Update PSR state
  * @intel_dp: Intel DP
@@ -877,8 +892,13 @@ void intel_psr_update(struct intel_dp *intel_dp,
 	enable = crtc_state->has_psr && psr_global_enabled(psr->debug);
 	psr2_enable = intel_psr2_enabled(dev_priv, crtc_state);
 
-	if (enable == psr->enabled && psr2_enable == psr->psr2_enabled)
+	if (enable == psr->enabled && psr2_enable == psr->psr2_enabled) {
+		/* Force a PSR exit when enabling CRC to avoid CRC timeouts */
+		if (crtc_state->crc_enabled && psr->enabled)
+			psr_force_hw_tracking_exit(dev_priv);
+
 		goto unlock;
+	}
 
 	if (psr->enabled)
 		intel_psr_disable_locked(intel_dp);
@@ -1148,18 +1168,8 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
 	dev_priv->psr.busy_frontbuffer_bits &= ~frontbuffer_bits;
 
 	/* By definition flush = invalidate + flush */
-	if (frontbuffer_bits) {
-		/*
-		 * Display WA #0884: all
-		 * This documented WA for bxt can be safely applied
-		 * broadly so we can force HW tracking to exit PSR
-		 * instead of disabling and re-enabling.
-		 * Workaround tells us to write 0 to CUR_SURFLIVE_A,
-		 * but it makes more sense write to the current active
-		 * pipe.
-		 */
-		I915_WRITE(CURSURFLIVE(dev_priv->psr.pipe), 0);
-	}
+	if (frontbuffer_bits)
+		psr_force_hw_tracking_exit(dev_priv);
 
 	if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)
 		schedule_work(&dev_priv->psr.work);
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v6 9/9] drm/i915: Enable PSR2 by default
  2019-03-08  0:00 [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
                   ` (6 preceding siblings ...)
  2019-03-08  0:00 ` [PATCH v6 8/9] drm/i915: Force PSR1 exit when getting pipe CRC José Roberto de Souza
@ 2019-03-08  0:00 ` José Roberto de Souza
  2019-03-08  1:13 ` ✗ Fi.CI.SPARSE: warning for series starting with [v6,1/9] drm/i915/psr: Remove PSR2 FIXME Patchwork
                   ` (2 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: José Roberto de Souza @ 2019-03-08  0:00 UTC (permalink / raw)
  To: intel-gfx; +Cc: Dhinakaran Pandiyan

The support for PSR2 was polished, IGT tests for PSR2 was added and
it was tested performing regular user workloads like browsing,
editing documents and compiling Linux, so it is time to enable it by
default and enjoy even more power-savings.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 053dbba6abde..7bab6a009e0d 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -80,9 +80,6 @@ static bool intel_psr2_enabled(struct drm_i915_private *dev_priv,
 	case I915_PSR_DEBUG_DISABLE:
 	case I915_PSR_DEBUG_FORCE_PSR1:
 		return false;
-	case I915_PSR_DEBUG_DEFAULT:
-		if (i915_modparams.enable_psr <= 0)
-			return false;
 	default:
 		return crtc_state->has_psr2;
 	}
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* ✗ Fi.CI.SPARSE: warning for series starting with [v6,1/9] drm/i915/psr: Remove PSR2 FIXME
  2019-03-08  0:00 [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
                   ` (7 preceding siblings ...)
  2019-03-08  0:00 ` [PATCH v6 9/9] drm/i915: Enable PSR2 by default José Roberto de Souza
@ 2019-03-08  1:13 ` Patchwork
  2019-03-08  1:39 ` ✓ Fi.CI.BAT: success " Patchwork
  2019-03-08  5:33 ` ✓ Fi.CI.IGT: " Patchwork
  10 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-03-08  1:13 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v6,1/9] drm/i915/psr: Remove PSR2 FIXME
URL   : https://patchwork.freedesktop.org/series/57716/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/psr: Remove PSR2 FIXME
Okay!

Commit: drm/i915/psr: Only lookup for enabled CRTCs when forcing a fastset
Okay!

Commit: drm/i915: Compute and commit color features in fastsets
Okay!

Commit: drm/i915/psr: Drop test for EDP in CRTC when forcing commit
Okay!

Commit: drm/i915/crc: Make IPS workaround generic
Okay!

Commit: drm/i915: Disable PSR2 while getting pipe CRC
Okay!

Commit: drm/i915: Drop redundant checks to update PSR state
Okay!

Commit: drm/i915: Force PSR1 exit when getting pipe CRC
-O:drivers/gpu/drm/i915/intel_psr.c:454:23: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/intel_psr.c:454:23: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_psr.c:454:23: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_psr.c:454:23: warning: expression using sizeof(void)

Commit: drm/i915: Enable PSR2 by default
Okay!

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [v6,1/9] drm/i915/psr: Remove PSR2 FIXME
  2019-03-08  0:00 [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
                   ` (8 preceding siblings ...)
  2019-03-08  1:13 ` ✗ Fi.CI.SPARSE: warning for series starting with [v6,1/9] drm/i915/psr: Remove PSR2 FIXME Patchwork
@ 2019-03-08  1:39 ` Patchwork
  2019-03-08  5:33 ` ✓ Fi.CI.IGT: " Patchwork
  10 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-03-08  1:39 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v6,1/9] drm/i915/psr: Remove PSR2 FIXME
URL   : https://patchwork.freedesktop.org/series/57716/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5718 -> Patchwork_12412
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/57716/revisions/1/mbox/

Known issues
------------

  Here are the changes found in Patchwork_12412 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109315] +17

  * igt@amdgpu/amd_cs_nop@sync-gfx0:
    - fi-cfl-guc:         NOTRUN -> SKIP [fdo#109271] +49

  * igt@gem_cpu_reloc@basic:
    - fi-kbl-7560u:       PASS -> INCOMPLETE [fdo#103665]

  * igt@gem_exec_basic@gtt-bsd1:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109276] +7

  * igt@gem_exec_parse@basic-rejected:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109289] +1

  * igt@i915_selftest@live_contexts:
    - fi-icl-u3:          NOTRUN -> DMESG-FAIL [fdo#108569]

  * igt@kms_busy@basic-flip-a:
    - fi-kbl-7567u:       PASS -> SKIP [fdo#109271] / [fdo#109278] +2
    - fi-gdg-551:         PASS -> FAIL [fdo#103182]

  * igt@kms_chamelium@hdmi-edid-read:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109284] +8

  * igt@kms_force_connector_basic@prune-stale-modes:
    - fi-icl-u3:          NOTRUN -> SKIP [fdo#109285] +3

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u3:          NOTRUN -> FAIL [fdo#103167]
    - fi-byt-clapper:     PASS -> FAIL [fdo#103167]

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
    - fi-byt-clapper:     PASS -> FAIL [fdo#103191] / [fdo#107362]

  * igt@kms_psr@cursor_plane_move:
    - fi-whl-u:           PASS -> FAIL [fdo#107383] +3

  * igt@runner@aborted:
    - fi-apl-guc:         NOTRUN -> FAIL [fdo#108622] / [fdo#109720]

  
#### Possible fixes ####

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-byt-j1900:       SKIP [fdo#109271] -> PASS

  * igt@i915_pm_rpm@basic-rte:
    - fi-byt-j1900:       FAIL [fdo#108800] -> PASS

  * igt@i915_selftest@live_hangcheck:
    - fi-ilk-650:         INCOMPLETE [fdo#109723] -> PASS

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-kbl-7567u:       WARN [fdo#109380] -> PASS

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          FAIL [fdo#103167] -> PASS

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
    - fi-kbl-7567u:       SKIP [fdo#109271] -> PASS +33

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
  [fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
  [fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
  [fdo#109723]: https://bugs.freedesktop.org/show_bug.cgi?id=109723


Participating hosts (42 -> 40)
------------------------------

  Additional (2): fi-cfl-guc fi-icl-u3 
  Missing    (4): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan 


Build changes
-------------

    * Linux: CI_DRM_5718 -> Patchwork_12412

  CI_DRM_5718: 0d3ac523602514ac4473fca213efd8ffba373844 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4876: 51b8d4cfde8d5b0176180b9683accea91474c7ff @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12412: 61cf0d27e1e6c739639ff969460a1b79cb2b360e @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

61cf0d27e1e6 drm/i915: Enable PSR2 by default
1679d3cd4598 drm/i915: Force PSR1 exit when getting pipe CRC
51a6a8a4f3c3 drm/i915: Drop redundant checks to update PSR state
2d82fd05ae97 drm/i915: Disable PSR2 while getting pipe CRC
399613ca9ce5 drm/i915/crc: Make IPS workaround generic
361adce4215c drm/i915/psr: Drop test for EDP in CRTC when forcing commit
b1c0835b7f9f drm/i915: Compute and commit color features in fastsets
a5597b5500fb drm/i915/psr: Only lookup for enabled CRTCs when forcing a fastset
0044d9d4885d drm/i915/psr: Remove PSR2 FIXME

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12412/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* ✓ Fi.CI.IGT: success for series starting with [v6,1/9] drm/i915/psr: Remove PSR2 FIXME
  2019-03-08  0:00 [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
                   ` (9 preceding siblings ...)
  2019-03-08  1:39 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-03-08  5:33 ` Patchwork
  2019-03-08 18:52   ` Souza, Jose
  10 siblings, 1 reply; 14+ messages in thread
From: Patchwork @ 2019-03-08  5:33 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v6,1/9] drm/i915/psr: Remove PSR2 FIXME
URL   : https://patchwork.freedesktop.org/series/57716/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5718_full -> Patchwork_12412_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_12412_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_rpm@gem-execbuf-stress:
    - shard-skl:          PASS -> INCOMPLETE [fdo#107803] / [fdo#107807]

  * igt@kms_atomic_transition@3x-modeset-transitions-nonblocking:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +9

  * igt@kms_busy@basic-modeset-e:
    - shard-glk:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_busy@extended-pageflip-hang-newfb-render-e:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
    - shard-kbl:          PASS -> DMESG-WARN [fdo#107956]

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
    - shard-glk:          PASS -> FAIL [fdo#108145]

  * igt@kms_chv_cursor_fail@pipe-a-128x128-left-edge:
    - shard-hsw:          PASS -> INCOMPLETE [fdo#103540]

  * igt@kms_color@pipe-c-legacy-gamma:
    - shard-glk:          PASS -> FAIL [fdo#104782]

  * igt@kms_cursor_crc@cursor-256x85-random:
    - shard-apl:          PASS -> FAIL [fdo#103232] +1

  * igt@kms_cursor_crc@cursor-size-change:
    - shard-glk:          PASS -> FAIL [fdo#103232]

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-skl:          PASS -> INCOMPLETE [fdo#109507]

  * igt@kms_flip@modeset-vs-vblank-race-interruptible:
    - shard-glk:          PASS -> FAIL [fdo#103060]

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] +26

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-glk:          PASS -> FAIL [fdo#103167] +1

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] +68

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] +8

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-snb:          PASS -> INCOMPLETE [fdo#105411]

  * igt@kms_plane@plane-position-covered-pipe-a-planes:
    - shard-apl:          PASS -> FAIL [fdo#103166] +1

  * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb:
    - shard-skl:          NOTRUN -> FAIL [fdo#108145]

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
    - shard-glk:          PASS -> FAIL [fdo#103166] +2

  * igt@kms_psr@primary_blt:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] +19

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-kbl:          PASS -> INCOMPLETE [fdo#103665]

  * igt@kms_setmode@basic:
    - shard-kbl:          PASS -> FAIL [fdo#99912]

  * igt@perf_pmu@idle-vcs1:
    - shard-glk:          NOTRUN -> SKIP [fdo#109271] +13

  
#### Possible fixes ####

  * igt@i915_pm_rpm@universal-planes:
    - shard-skl:          INCOMPLETE [fdo#107807] -> PASS

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
    - shard-apl:          FAIL [fdo#106510] / [fdo#108145] -> PASS +1

  * igt@kms_color@pipe-a-ctm-max:
    - shard-apl:          FAIL [fdo#108147] -> PASS

  * igt@kms_color@pipe-b-degamma:
    - shard-apl:          FAIL [fdo#104782] -> PASS

  * igt@kms_color@pipe-c-ctm-green-to-red:
    - shard-skl:          FAIL [fdo#107201] -> PASS

  * igt@kms_cursor_crc@cursor-256x256-random:
    - shard-apl:          FAIL [fdo#103232] -> PASS +1

  * igt@kms_cursor_crc@cursor-64x21-offscreen:
    - shard-skl:          FAIL [fdo#103232] -> PASS

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          FAIL [fdo#105363] -> PASS

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          DMESG-WARN [fdo#108566] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
    - shard-glk:          FAIL [fdo#103167] -> PASS +4

  * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
    - shard-apl:          FAIL [fdo#108948] -> PASS

  * igt@kms_plane@plane-panning-bottom-right-pipe-b-planes:
    - shard-skl:          FAIL [fdo#103166] -> PASS

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-glk:          INCOMPLETE [fdo#103359] / [k.org#198133] -> PASS

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          FAIL [fdo#108145] -> PASS

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
    - shard-snb:          SKIP [fdo#109271] -> PASS +1

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
    - shard-apl:          FAIL [fdo#103166] -> PASS

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-kbl:          DMESG-FAIL [fdo#105763] -> PASS

  * igt@kms_vblank@pipe-b-ts-continuation-modeset-hang:
    - shard-apl:          FAIL [fdo#104894] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
  [fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#106510]: https://bugs.freedesktop.org/show_bug.cgi?id=106510
  [fdo#107201]: https://bugs.freedesktop.org/show_bug.cgi?id=107201
  [fdo#107803]: https://bugs.freedesktop.org/show_bug.cgi?id=107803
  [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
  [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (6 -> 6)
------------------------------

  No changes in participating hosts


Build changes
-------------

    * Linux: CI_DRM_5718 -> Patchwork_12412

  CI_DRM_5718: 0d3ac523602514ac4473fca213efd8ffba373844 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4876: 51b8d4cfde8d5b0176180b9683accea91474c7ff @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12412: 61cf0d27e1e6c739639ff969460a1b79cb2b360e @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12412/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v6 8/9] drm/i915: Force PSR1 exit when getting pipe CRC
  2019-03-08  0:00 ` [PATCH v6 8/9] drm/i915: Force PSR1 exit when getting pipe CRC José Roberto de Souza
@ 2019-03-08 18:44   ` Souza, Jose
  0 siblings, 0 replies; 14+ messages in thread
From: Souza, Jose @ 2019-03-08 18:44 UTC (permalink / raw)
  To: intel-gfx; +Cc: Pandiyan, Dhinakaran


[-- Attachment #1.1: Type: text/plain, Size: 4419 bytes --]

On Thu, 2019-03-07 at 16:00 -0800, José Roberto de Souza wrote:
> If PSR1 is active when pipe CRC is enabled the CRC calculations will
> be inhibit by the transition to low power states that PSR1 brings.
> So lets force a PSR1 exit and as soon as pipe CRC is enabled it will
> block PSR1 activation and avoid CRC timeouts when running IGT tests.
> 
> There is a little window between the call to force exit PSR and the
> write to pipe CRC registers that needs to happen within the minimum
> of 6 idles frames otherwise PSR1 will be active again causing the CRC
> timeouts but anyways this will at least reduce the occurrence of CRC
> timeouts.
> 
> This can possibily fix issues present right now but I did not found
> any open, I mostly got this issue from previous CI runs of this
> series, bellow some exambles:
> 
> * igt@kms_color@pipe-b-ctm-0-75:
> - shard-apl:          PASS -> FAIL +9
> 
> * igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy:
> - shard-apl:          PASS -> DMESG-FAIL +17
> 
> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
> - shard-kbl:          PASS -> DMESG-FAIL +12
> 
> * igt@kms_pipe_crc_basic@read-crc-pipe-c:
> - shard-kbl:          PASS -> FAIL +7
> 
> v6: s/PSR/PSR1 (Dhinakaran)

I forgot to add DK's rv-b

https://patchwork.freedesktop.org/patch/290564/?series=57628&rev=1#comment_547027

> 
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_psr.c | 36 ++++++++++++++++++++--------
> ----
>  1 file changed, 23 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 9847f6b0cd9a..053dbba6abde 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -452,6 +452,7 @@ static void hsw_activate_psr1(struct intel_dp
> *intel_dp)
>  	 * frames, we'll go with 9 frames for now
>  	 */
>  	idle_frames = max(idle_frames, dev_priv->psr.sink_sync_latency
> + 1);
> +
>  	val |= idle_frames << EDP_PSR_IDLE_FRAME_SHIFT;
>  
>  	val |= max_sleep_time << EDP_PSR_MAX_SLEEP_TIME_SHIFT;
> @@ -853,6 +854,20 @@ void intel_psr_disable(struct intel_dp
> *intel_dp,
>  	cancel_work_sync(&dev_priv->psr.work);
>  }
>  
> +static void psr_force_hw_tracking_exit(struct drm_i915_private
> *dev_priv)
> +{
> +	/*
> +	 * Display WA #0884: all
> +	 * This documented WA for bxt can be safely applied
> +	 * broadly so we can force HW tracking to exit PSR
> +	 * instead of disabling and re-enabling.
> +	 * Workaround tells us to write 0 to CUR_SURFLIVE_A,
> +	 * but it makes more sense write to the current active
> +	 * pipe.
> +	 */
> +	I915_WRITE(CURSURFLIVE(dev_priv->psr.pipe), 0);
> +}
> +
>  /**
>   * intel_psr_update - Update PSR state
>   * @intel_dp: Intel DP
> @@ -877,8 +892,13 @@ void intel_psr_update(struct intel_dp *intel_dp,
>  	enable = crtc_state->has_psr && psr_global_enabled(psr->debug);
>  	psr2_enable = intel_psr2_enabled(dev_priv, crtc_state);
>  
> -	if (enable == psr->enabled && psr2_enable == psr->psr2_enabled)
> +	if (enable == psr->enabled && psr2_enable == psr->psr2_enabled) 
> {
> +		/* Force a PSR exit when enabling CRC to avoid CRC
> timeouts */
> +		if (crtc_state->crc_enabled && psr->enabled)
> +			psr_force_hw_tracking_exit(dev_priv);
> +
>  		goto unlock;
> +	}
>  
>  	if (psr->enabled)
>  		intel_psr_disable_locked(intel_dp);
> @@ -1148,18 +1168,8 @@ void intel_psr_flush(struct drm_i915_private
> *dev_priv,
>  	dev_priv->psr.busy_frontbuffer_bits &= ~frontbuffer_bits;
>  
>  	/* By definition flush = invalidate + flush */
> -	if (frontbuffer_bits) {
> -		/*
> -		 * Display WA #0884: all
> -		 * This documented WA for bxt can be safely applied
> -		 * broadly so we can force HW tracking to exit PSR
> -		 * instead of disabling and re-enabling.
> -		 * Workaround tells us to write 0 to CUR_SURFLIVE_A,
> -		 * but it makes more sense write to the current active
> -		 * pipe.
> -		 */
> -		I915_WRITE(CURSURFLIVE(dev_priv->psr.pipe), 0);
> -	}
> +	if (frontbuffer_bits)
> +		psr_force_hw_tracking_exit(dev_priv);
>  
>  	if (!dev_priv->psr.active && !dev_priv-
> >psr.busy_frontbuffer_bits)
>  		schedule_work(&dev_priv->psr.work);

[-- Attachment #1.2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

[-- Attachment #2: Type: text/plain, Size: 159 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: ✓ Fi.CI.IGT: success for series starting with [v6,1/9] drm/i915/psr: Remove PSR2 FIXME
  2019-03-08  5:33 ` ✓ Fi.CI.IGT: " Patchwork
@ 2019-03-08 18:52   ` Souza, Jose
  0 siblings, 0 replies; 14+ messages in thread
From: Souza, Jose @ 2019-03-08 18:52 UTC (permalink / raw)
  To: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 8493 bytes --]

And pushed to dinq

On Fri, 2019-03-08 at 05:33 +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: series starting with [v6,1/9] drm/i915/psr: Remove PSR2 FIXME
> URL   : https://patchwork.freedesktop.org/series/57716/
> State : success
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_5718_full -> Patchwork_12412_full
> ====================================================
> 
> Summary
> -------
> 
>   **SUCCESS**
> 
>   No regressions found.
> 
>   
> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_12412_full that come from
> known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@i915_pm_rpm@gem-execbuf-stress:
>     - shard-skl:          PASS -> INCOMPLETE [fdo#107803] /
> [fdo#107807]
> 
>   * igt@kms_atomic_transition@3x-modeset-transitions-nonblocking:
>     - shard-snb:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
> +9
> 
>   * igt@kms_busy@basic-modeset-e:
>     - shard-glk:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
> 
>   * igt@kms_busy@extended-pageflip-hang-newfb-render-e:
>     - shard-kbl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
> 
>   * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
>     - shard-kbl:          PASS -> DMESG-WARN [fdo#107956]
> 
>   * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
>     - shard-glk:          PASS -> FAIL [fdo#108145]
> 
>   * igt@kms_chv_cursor_fail@pipe-a-128x128-left-edge:
>     - shard-hsw:          PASS -> INCOMPLETE [fdo#103540]
> 
>   * igt@kms_color@pipe-c-legacy-gamma:
>     - shard-glk:          PASS -> FAIL [fdo#104782]
> 
>   * igt@kms_cursor_crc@cursor-256x85-random:
>     - shard-apl:          PASS -> FAIL [fdo#103232] +1
> 
>   * igt@kms_cursor_crc@cursor-size-change:
>     - shard-glk:          PASS -> FAIL [fdo#103232]
> 
>   * igt@kms_flip@flip-vs-suspend-interruptible:
>     - shard-skl:          PASS -> INCOMPLETE [fdo#109507]
> 
>   * igt@kms_flip@modeset-vs-vblank-race-interruptible:
>     - shard-glk:          PASS -> FAIL [fdo#103060]
> 
>   * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt:
>     - shard-skl:          NOTRUN -> SKIP [fdo#109271] +26
> 
>   * igt@kms
> _frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc:
>     - shard-glk:          PASS -> FAIL [fdo#103167] +1
> 
>   * igt@kms
> _frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu:
>     - shard-snb:          NOTRUN -> SKIP [fdo#109271] +68
> 
>   * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
>     - shard-apl:          NOTRUN -> SKIP [fdo#109271] +8
> 
>   * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
>     - shard-snb:          PASS -> INCOMPLETE [fdo#105411]
> 
>   * igt@kms_plane@plane-position-covered-pipe-a-planes:
>     - shard-apl:          PASS -> FAIL [fdo#103166] +1
> 
>   * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb:
>     - shard-skl:          NOTRUN -> FAIL [fdo#108145]
> 
>   * igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
>     - shard-glk:          PASS -> FAIL [fdo#103166] +2
> 
>   * igt@kms_psr@primary_blt:
>     - shard-kbl:          NOTRUN -> SKIP [fdo#109271] +19
> 
>   * igt@kms_rotation_crc@multiplane-rotation:
>     - shard-kbl:          PASS -> INCOMPLETE [fdo#103665]
> 
>   * igt@kms_setmode@basic:
>     - shard-kbl:          PASS -> FAIL [fdo#99912]
> 
>   * igt@perf_pmu@idle-vcs1:
>     - shard-glk:          NOTRUN -> SKIP [fdo#109271] +13
> 
>   
> #### Possible fixes ####
> 
>   * igt@i915_pm_rpm@universal-planes:
>     - shard-skl:          INCOMPLETE [fdo#107807] -> PASS
> 
>   * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
>     - shard-apl:          FAIL [fdo#106510] / [fdo#108145] -> PASS +1
> 
>   * igt@kms_color@pipe-a-ctm-max:
>     - shard-apl:          FAIL [fdo#108147] -> PASS
> 
>   * igt@kms_color@pipe-b-degamma:
>     - shard-apl:          FAIL [fdo#104782] -> PASS
> 
>   * igt@kms_color@pipe-c-ctm-green-to-red:
>     - shard-skl:          FAIL [fdo#107201] -> PASS
> 
>   * igt@kms_cursor_crc@cursor-256x256-random:
>     - shard-apl:          FAIL [fdo#103232] -> PASS +1
> 
>   * igt@kms_cursor_crc@cursor-64x21-offscreen:
>     - shard-skl:          FAIL [fdo#103232] -> PASS
> 
>   * igt@kms_flip@flip-vs-expired-vblank-interruptible:
>     - shard-skl:          FAIL [fdo#105363] -> PASS
> 
>   * igt@kms_flip@flip-vs-suspend-interruptible:
>     - shard-apl:          DMESG-WARN [fdo#108566] -> PASS
> 
>   * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen
> :
>     - shard-glk:          FAIL [fdo#103167] -> PASS +4
> 
>   * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
>     - shard-apl:          FAIL [fdo#108948] -> PASS
> 
>   * igt@kms_plane@plane-panning-bottom-right-pipe-b-planes:
>     - shard-skl:          FAIL [fdo#103166] -> PASS
> 
>   * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
>     - shard-glk:          INCOMPLETE [fdo#103359] / [k.org#198133] ->
> PASS
> 
>   * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
>     - shard-skl:          FAIL [fdo#108145] -> PASS
> 
>   * igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
>     - shard-snb:          SKIP [fdo#109271] -> PASS +1
> 
>   * igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
>     - shard-apl:          FAIL [fdo#103166] -> PASS
> 
>   * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
>     - shard-kbl:          DMESG-FAIL [fdo#105763] -> PASS
> 
>   * igt@kms_vblank@pipe-b-ts-continuation-modeset-hang:
>     - shard-apl:          FAIL [fdo#104894] -> PASS
> 
>   
>   {name}: This element is suppressed. This means it is ignored when
> computing
>           the status of the difference (SUCCESS, WARNING, or
> FAILURE).
> 
>   [fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
>   [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
>   [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
>   [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
>   [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
>   [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
>   [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
>   [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
>   [fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
>   [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
>   [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
>   [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
>   [fdo#106510]: https://bugs.freedesktop.org/show_bug.cgi?id=106510
>   [fdo#107201]: https://bugs.freedesktop.org/show_bug.cgi?id=107201
>   [fdo#107803]: https://bugs.freedesktop.org/show_bug.cgi?id=107803
>   [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
>   [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
>   [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
>   [fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
>   [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
>   [fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
>   [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
>   [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
>   [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
> 
> 
> Participating hosts (6 -> 6)
> ------------------------------
> 
>   No changes in participating hosts
> 
> 
> Build changes
> -------------
> 
>     * Linux: CI_DRM_5718 -> Patchwork_12412
> 
>   CI_DRM_5718: 0d3ac523602514ac4473fca213efd8ffba373844 @
> git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_4876: 51b8d4cfde8d5b0176180b9683accea91474c7ff @
> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_12412: 61cf0d27e1e6c739639ff969460a1b79cb2b360e @
> git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
> git://anongit.freedesktop.org/piglit
> 
> == Logs ==
> 
> For more details see: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12412/

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^ permalink raw reply	[flat|nested] 14+ messages in thread

end of thread, other threads:[~2019-03-08 18:52 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-03-08  0:00 [PATCH v6 1/9] drm/i915/psr: Remove PSR2 FIXME José Roberto de Souza
2019-03-08  0:00 ` [PATCH v6 2/9] drm/i915/psr: Only lookup for enabled CRTCs when forcing a fastset José Roberto de Souza
2019-03-08  0:00 ` [PATCH v6 3/9] drm/i915: Compute and commit color features in fastsets José Roberto de Souza
2019-03-08  0:00 ` [PATCH v6 4/9] drm/i915/psr: Drop test for EDP in CRTC when forcing commit José Roberto de Souza
2019-03-08  0:00 ` [PATCH v6 5/9] drm/i915/crc: Make IPS workaround generic José Roberto de Souza
2019-03-08  0:00 ` [PATCH v6 6/9] drm/i915: Disable PSR2 while getting pipe CRC José Roberto de Souza
2019-03-08  0:00 ` [PATCH v6 7/9] drm/i915: Drop redundant checks to update PSR state José Roberto de Souza
2019-03-08  0:00 ` [PATCH v6 8/9] drm/i915: Force PSR1 exit when getting pipe CRC José Roberto de Souza
2019-03-08 18:44   ` Souza, Jose
2019-03-08  0:00 ` [PATCH v6 9/9] drm/i915: Enable PSR2 by default José Roberto de Souza
2019-03-08  1:13 ` ✗ Fi.CI.SPARSE: warning for series starting with [v6,1/9] drm/i915/psr: Remove PSR2 FIXME Patchwork
2019-03-08  1:39 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-08  5:33 ` ✓ Fi.CI.IGT: " Patchwork
2019-03-08 18:52   ` Souza, Jose

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