From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:45615) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2CDS-0000x7-Ly for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:54:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2CDR-0006Vv-U4 for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:54:58 -0500 Received: from mail.uni-paderborn.de ([131.234.142.9]:49544) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2CDR-0006V5-Lg for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:54:57 -0500 From: Bastian Koppelmann Date: Fri, 8 Mar 2019 10:54:33 +0100 Message-Id: <20190308095433.12116-3-kbastian@mail.uni-paderborn.de> In-Reply-To: <20190308095433.12116-1-kbastian@mail.uni-paderborn.de> References: <20190308095433.12116-1-kbastian@mail.uni-paderborn.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PULL 2/2] tricore: fixed RCR_CADDN instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: david.brenken@efs-auto.de, christian.richter@efs-auto.de, georg.hofstetter@efs-auto.de, robert.rasche@efs-auto.de, lars.biermanski@efs-auto.de From: David Brenken Signed-off-by: Christian Richter Signed-off-by: David Brenken Signed-off-by: Georg Hofstetter Signed-off-by: Robert Rasche Signed-off-by: Lars Biermanski Message-Id: <20190207073928.4048-3-david.brenken@efs-auto.org> Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 5846f95316..b12c391be5 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -5871,8 +5871,8 @@ static void decode_rcr_cond_select(CPUTriCoreState *env, DisasContext *ctx) cpu_gpr_d[r3]); break; case OPC2_32_RCR_CADDN: - gen_condi_add(TCG_COND_EQ, cpu_gpr_d[r1], const9, cpu_gpr_d[r3], - cpu_gpr_d[r4]); + gen_condi_add(TCG_COND_EQ, cpu_gpr_d[r1], const9, cpu_gpr_d[r4], + cpu_gpr_d[r3]); break; case OPC2_32_RCR_SEL: temp = tcg_const_i32(0); -- 2.21.0