From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_NEOMUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F18CC43381 for ; Thu, 14 Mar 2019 10:00:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3C54720854 for ; Thu, 14 Mar 2019 10:00:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726962AbfCNKA5 (ORCPT ); Thu, 14 Mar 2019 06:00:57 -0400 Received: from metis.ext.pengutronix.de ([85.220.165.71]:46827 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726653AbfCNKA5 (ORCPT ); Thu, 14 Mar 2019 06:00:57 -0400 Received: from pty.hi.pengutronix.de ([2001:67c:670:100:1d::c5]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1h4NAJ-0006O9-DV; Thu, 14 Mar 2019 11:00:43 +0100 Received: from ukl by pty.hi.pengutronix.de with local (Exim 4.89) (envelope-from ) id 1h4NAI-0002HD-JJ; Thu, 14 Mar 2019 11:00:42 +0100 Date: Thu, 14 Mar 2019 11:00:42 +0100 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= To: Anson Huang Cc: "thierry.reding@gmail.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "linux@armlinux.org.uk" , "stefan@agner.ch" , "otavio@ossystems.com.br" , Leonard Crestez , "schnitzeltony@gmail.com" , "jan.tuerk@emtrion.com" , Robin Gong , "linux-pwm@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , dl-linux-imx Subject: Re: [PATCH V2 2/5] pwm: Add i.MX TPM PWM driver support Message-ID: <20190314100042.fl4kdwn7awcw4aov@pengutronix.de> References: <1552461970-20813-1-git-send-email-Anson.Huang@nxp.com> <1552461970-20813-3-git-send-email-Anson.Huang@nxp.com> <20190314091702.sooxvnzd4mqr2ilz@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: NeoMutt/20170113 (1.7.2) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c5 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, On Thu, Mar 14, 2019 at 09:49:06AM +0000, Anson Huang wrote: > > On Wed, Mar 13, 2019 at 07:31:16AM +0000, Anson Huang wrote: > > > +static void imx_tpm_pwm_config(struct pwm_chip *chip, > > > + struct pwm_device *pwm, > > > + struct pwm_state *state) > > > +{ > > > + struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); > > > + static bool tpm_cnt_initialized; > > > + unsigned int duty_cnt; > > > + u32 val; > > > + u64 tmp; > > > + > > > + /* > > > + * TPM counter is shared by multi channels, let's make it to be > > > + * ONLY first channel can config TPM counter's precale and period > > > + * count. > > > + */ > > > + if (!tpm_cnt_initialized) { > > > + imx_tpm_pwm_config_counter(chip, state->period); > > > + tpm_cnt_initialized = true; > > > + } > > > > So the period can only be configured once. That is not as good as it could be. > > You should allow a change whenever there is exactly one PWM in use. > > OK, maybe I can add check for other channels' statue here, and allow the period > update if ONLY 1 channel is enabled. See how the SiFive patch that I already pointed out solves this same problem. > > > + /* set duty counter */ > > > + tmp = readl(tpm->base + TPM_MOD) & TPM_MOD_MOD_MASK; > > > + tmp *= state->duty_cycle; > > > + duty_cnt = DIV_ROUND_CLOSEST_ULL(tmp, state->period); > > > > Uah, you use state->period here even though for the 2nd PWM the Divider > > might not be setup appropriately. > > I think that is 1 limitation here, the dts should make sure the period used for > different channels are same or at least they can share same divider, otherwise, > what if multiple channels can NOT find a divider good for every channel? How to > deal with this case? You should return -ERANGE or -EINVAL for the calls that cannot be satisfied. > > > [...] > > > +static int imx_tpm_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, > > > + struct pwm_state *state) > > > +{ > > > + struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); > > > + struct pwm_state curstate; > > > + unsigned long flags; > > > + > > > + imx_tpm_pwm_get_state(chip, pwm, &curstate); > > > + > > > + spin_lock_irqsave(&tpm->lock, flags); > > > + > > > + if (state->period != curstate.period || > > > + state->duty_cycle != curstate.duty_cycle || > > > + state->polarity != curstate.polarity) > > > + imx_tpm_pwm_config(chip, pwm, state); > > > + > > > + if (state->enabled != curstate.enabled) > > > + imx_tpm_pwm_enable(chip, pwm, state->enabled); > > > > This is wrong. This sequence: > > > > pwm_apply_state(pwm, { .duty_cycle = 0, .period = 10000, .enabled = > > true }); > > pwm_apply_state(pwm, { .duty_cycle = 10000, .period = > > 10000, .enabled = false }); > > > > must keep the output pin low which isn't guaranteed here. > > So you mean for every .apply operation, the channel MUST be disabled first, then config > it, then enable it? No. I only say that you should not configure the new period and duty cycle if in the end the hardware should be disabled. Always disabling is wrong, too. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | http://www.pengutronix.de/ | From mboxrd@z Thu Jan 1 00:00:00 1970 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= Subject: Re: [PATCH V2 2/5] pwm: Add i.MX TPM PWM driver support Date: Thu, 14 Mar 2019 11:00:42 +0100 Message-ID: <20190314100042.fl4kdwn7awcw4aov@pengutronix.de> References: <1552461970-20813-1-git-send-email-Anson.Huang@nxp.com> <1552461970-20813-3-git-send-email-Anson.Huang@nxp.com> <20190314091702.sooxvnzd4mqr2ilz@pengutronix.de> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit Return-path: Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Anson Huang Cc: "thierry.reding@gmail.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "linux@armlinux.org.uk" , "stefan@agner.ch" , "otavio@ossystems.com.br" , Leonard Crestez , "schnitzeltony@gmail.com" , "jan.tuerk@emtrion.com" , Robin Gong , "linux-pwm@vger.kernel.org" , "devicetree@vger.kernel.org" l List-Id: devicetree@vger.kernel.org Hello, On Thu, Mar 14, 2019 at 09:49:06AM +0000, Anson Huang wrote: > > On Wed, Mar 13, 2019 at 07:31:16AM +0000, Anson Huang wrote: > > > +static void imx_tpm_pwm_config(struct pwm_chip *chip, > > > + struct pwm_device *pwm, > > > + struct pwm_state *state) > > > +{ > > > + struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); > > > + static bool tpm_cnt_initialized; > > > + unsigned int duty_cnt; > > > + u32 val; > > > + u64 tmp; > > > + > > > + /* > > > + * TPM counter is shared by multi channels, let's make it to be > > > + * ONLY first channel can config TPM counter's precale and period > > > + * count. > > > + */ > > > + if (!tpm_cnt_initialized) { > > > + imx_tpm_pwm_config_counter(chip, state->period); > > > + tpm_cnt_initialized = true; > > > + } > > > > So the period can only be configured once. That is not as good as it could be. > > You should allow a change whenever there is exactly one PWM in use. > > OK, maybe I can add check for other channels' statue here, and allow the period > update if ONLY 1 channel is enabled. See how the SiFive patch that I already pointed out solves this same problem. > > > + /* set duty counter */ > > > + tmp = readl(tpm->base + TPM_MOD) & TPM_MOD_MOD_MASK; > > > + tmp *= state->duty_cycle; > > > + duty_cnt = DIV_ROUND_CLOSEST_ULL(tmp, state->period); > > > > Uah, you use state->period here even though for the 2nd PWM the Divider > > might not be setup appropriately. > > I think that is 1 limitation here, the dts should make sure the period used for > different channels are same or at least they can share same divider, otherwise, > what if multiple channels can NOT find a divider good for every channel? How to > deal with this case? You should return -ERANGE or -EINVAL for the calls that cannot be satisfied. > > > [...] > > > +static int imx_tpm_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, > > > + struct pwm_state *state) > > > +{ > > > + struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); > > > + struct pwm_state curstate; > > > + unsigned long flags; > > > + > > > + imx_tpm_pwm_get_state(chip, pwm, &curstate); > > > + > > > + spin_lock_irqsave(&tpm->lock, flags); > > > + > > > + if (state->period != curstate.period || > > > + state->duty_cycle != curstate.duty_cycle || > > > + state->polarity != curstate.polarity) > > > + imx_tpm_pwm_config(chip, pwm, state); > > > + > > > + if (state->enabled != curstate.enabled) > > > + imx_tpm_pwm_enable(chip, pwm, state->enabled); > > > > This is wrong. This sequence: > > > > pwm_apply_state(pwm, { .duty_cycle = 0, .period = 10000, .enabled = > > true }); > > pwm_apply_state(pwm, { .duty_cycle = 10000, .period = > > 10000, .enabled = false }); > > > > must keep the output pin low which isn't guaranteed here. > > So you mean for every .apply operation, the channel MUST be disabled first, then config > it, then enable it? No. I only say that you should not configure the new period and duty cycle if in the end the hardware should be disabled. Always disabling is wrong, too. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | http://www.pengutronix.de/ | From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, URIBL_BLOCKED,USER_AGENT_NEOMUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CC73C43381 for ; Thu, 14 Mar 2019 10:01:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4263720854 for ; Thu, 14 Mar 2019 10:01:08 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h4NAW-00049K-PM; Thu, 14 Mar 2019 10:00:56 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h4NAR-00048f-Js for linux-arm-kernel@lists.infradead.org; Thu, 14 Mar 2019 10:00:53 +0000 Received: from pty.hi.pengutronix.de ([2001:67c:670:100:1d::c5]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1h4NAJ-0006O9-DV; Thu, 14 Mar 2019 11:00:43 +0100 Received: from ukl by pty.hi.pengutronix.de with local (Exim 4.89) (envelope-from ) id 1h4NAI-0002HD-JJ; Thu, 14 Mar 2019 11:00:42 +0100 Date: Thu, 14 Mar 2019 11:00:42 +0100 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= To: Anson Huang Subject: Re: [PATCH V2 2/5] pwm: Add i.MX TPM PWM driver support Message-ID: <20190314100042.fl4kdwn7awcw4aov@pengutronix.de> References: <1552461970-20813-1-git-send-email-Anson.Huang@nxp.com> <1552461970-20813-3-git-send-email-Anson.Huang@nxp.com> <20190314091702.sooxvnzd4mqr2ilz@pengutronix.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20170113 (1.7.2) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c5 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190314_030051_813247_7F002DB9 X-CRM114-Status: GOOD ( 20.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "mark.rutland@arm.com" , "linux-pwm@vger.kernel.org" , Robin Gong , "schnitzeltony@gmail.com" , "otavio@ossystems.com.br" , "devicetree@vger.kernel.org" , "festevam@gmail.com" , "s.hauer@pengutronix.de" , "jan.tuerk@emtrion.com" , "linux@armlinux.org.uk" , "robh+dt@kernel.org" , "linux-kernel@vger.kernel.org" , "thierry.reding@gmail.com" , "stefan@agner.ch" , "kernel@pengutronix.de" , Leonard Crestez , "shawnguo@kernel.org" , "linux-arm-kernel@lists.infradead.org" , dl-linux-imx Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello, On Thu, Mar 14, 2019 at 09:49:06AM +0000, Anson Huang wrote: > > On Wed, Mar 13, 2019 at 07:31:16AM +0000, Anson Huang wrote: > > > +static void imx_tpm_pwm_config(struct pwm_chip *chip, > > > + struct pwm_device *pwm, > > > + struct pwm_state *state) > > > +{ > > > + struct imx_tpm_pwm_chip *tpm =3D to_imx_tpm_pwm_chip(chip); > > > + static bool tpm_cnt_initialized; > > > + unsigned int duty_cnt; > > > + u32 val; > > > + u64 tmp; > > > + > > > + /* > > > + * TPM counter is shared by multi channels, let's make it to be > > > + * ONLY first channel can config TPM counter's precale and period > > > + * count. > > > + */ > > > + if (!tpm_cnt_initialized) { > > > + imx_tpm_pwm_config_counter(chip, state->period); > > > + tpm_cnt_initialized =3D true; > > > + } > > = > > So the period can only be configured once. That is not as good as it co= uld be. > > You should allow a change whenever there is exactly one PWM in use. > = > OK, maybe I can add check for other channels' statue here, and allow the = period > update if ONLY 1 channel is enabled. See how the SiFive patch that I already pointed out solves this same problem. > > > + /* set duty counter */ > > > + tmp =3D readl(tpm->base + TPM_MOD) & TPM_MOD_MOD_MASK; > > > + tmp *=3D state->duty_cycle; > > > + duty_cnt =3D DIV_ROUND_CLOSEST_ULL(tmp, state->period); > > = > > Uah, you use state->period here even though for the 2nd PWM the Divider > > might not be setup appropriately. > = > I think that is 1 limitation here, the dts should make sure the period us= ed for > different channels are same or at least they can share same divider, othe= rwise, > what if multiple channels can NOT find a divider good for every channel? = How to > deal with this case? You should return -ERANGE or -EINVAL for the calls that cannot be satisfied. > > > [...] > > > +static int imx_tpm_pwm_apply(struct pwm_chip *chip, struct pwm_devic= e *pwm, > > > + struct pwm_state *state) > > > +{ > > > + struct imx_tpm_pwm_chip *tpm =3D to_imx_tpm_pwm_chip(chip); > > > + struct pwm_state curstate; > > > + unsigned long flags; > > > + > > > + imx_tpm_pwm_get_state(chip, pwm, &curstate); > > > + > > > + spin_lock_irqsave(&tpm->lock, flags); > > > + > > > + if (state->period !=3D curstate.period || > > > + state->duty_cycle !=3D curstate.duty_cycle || > > > + state->polarity !=3D curstate.polarity) > > > + imx_tpm_pwm_config(chip, pwm, state); > > > + > > > + if (state->enabled !=3D curstate.enabled) > > > + imx_tpm_pwm_enable(chip, pwm, state->enabled); > > = > > This is wrong. This sequence: > > = > > pwm_apply_state(pwm, { .duty_cycle =3D 0, .period =3D 10000, .enabled = =3D > > true }); > > pwm_apply_state(pwm, { .duty_cycle =3D 10000, .period =3D > > 10000, .enabled =3D false }); > > = > > must keep the output pin low which isn't guaranteed here. > = > So you mean for every .apply operation, the channel MUST be disabled firs= t, then config > it, then enable it? No. I only say that you should not configure the new period and duty cycle if in the end the hardware should be disabled. Always disabling is wrong, too. Best regards Uwe -- = Pengutronix e.K. | Uwe Kleine-K=F6nig | Industrial Linux Solutions | http://www.pengutronix.de/ | _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel