From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhenyu Wang Subject: Re: [PATCH 1/5] drm/i915: Mark up vGPU support for full-ppgtt Date: Fri, 15 Mar 2019 10:15:40 +0800 Message-ID: <20190315021540.GF10798@zhen-hp.sh.intel.com> References: <20190314223839.28258-1-chris@chris-wilson.co.uk> Reply-To: Zhenyu Wang Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1622355743==" Return-path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id DEC726E23F for ; Fri, 15 Mar 2019 02:26:03 +0000 (UTC) In-Reply-To: <20190314223839.28258-1-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1622355743== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="ghzN8eJ9Qlbqn3iT" Content-Disposition: inline --ghzN8eJ9Qlbqn3iT Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 2019.03.14 22:38:35 +0000, Chris Wilson wrote: > For compatibility reasons, we only care if the vGPU host provides > support for full-ppgtt. This is independent of the addressable memory > size, so remove the conflation of 48b from the capability name. >=20 > Based on a patch by Bob Paauwe >=20 > Signed-off-by: Chris Wilson > Cc: Bob Paauwe > Cc: Zhenyu Wang > Cc: Zhi Wang > --- > drivers/gpu/drm/i915/gvt/vgpu.c | 2 +- > drivers/gpu/drm/i915/i915_drv.c | 2 +- > drivers/gpu/drm/i915/i915_pvinfo.h | 2 +- > drivers/gpu/drm/i915/i915_vgpu.c | 4 ++-- > drivers/gpu/drm/i915/i915_vgpu.h | 2 +- > 5 files changed, 6 insertions(+), 6 deletions(-) > Looks good to me. Reviewed-by: Zhenyu Wang > diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/v= gpu.c > index 720e2b10adaa..314e40121e47 100644 > --- a/drivers/gpu/drm/i915/gvt/vgpu.c > +++ b/drivers/gpu/drm/i915/gvt/vgpu.c > @@ -44,7 +44,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu) > vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) =3D 0; > vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) =3D vgpu->id; > =20 > - vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) =3D VGT_CAPS_FULL_48BIT_PPGTT; > + vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) =3D VGT_CAPS_FULL_PPGTT; > vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |=3D VGT_CAPS_HWSP_EMULATION; > vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |=3D VGT_CAPS_HUGE_GTT; > =20 > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_= drv.c > index 0d743907e7bc..ad695cdc0487 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -1494,7 +1494,7 @@ static int i915_driver_init_hw(struct drm_i915_priv= ate *dev_priv) > =20 > if (HAS_PPGTT(dev_priv)) { > if (intel_vgpu_active(dev_priv) && > - !intel_vgpu_has_full_48bit_ppgtt(dev_priv)) { > + !intel_vgpu_has_full_ppgtt(dev_priv)) { > i915_report_error(dev_priv, > "incompatible vGPU found, support for isolated ppGTT required\n"); > return -ENXIO; > diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i9= 15_pvinfo.h > index eeaa3d506d95..969e514916ab 100644 > --- a/drivers/gpu/drm/i915/i915_pvinfo.h > +++ b/drivers/gpu/drm/i915/i915_pvinfo.h > @@ -52,7 +52,7 @@ enum vgt_g2v_type { > /* > * VGT capabilities type > */ > -#define VGT_CAPS_FULL_48BIT_PPGTT BIT(2) > +#define VGT_CAPS_FULL_PPGTT BIT(2) > #define VGT_CAPS_HWSP_EMULATION BIT(3) > #define VGT_CAPS_HUGE_GTT BIT(4) > =20 > diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915= _vgpu.c > index 869cf4a3b6de..3b2d83f704e3 100644 > --- a/drivers/gpu/drm/i915/i915_vgpu.c > +++ b/drivers/gpu/drm/i915/i915_vgpu.c > @@ -81,9 +81,9 @@ void i915_check_vgpu(struct drm_i915_private *dev_priv) > DRM_INFO("Virtual GPU for Intel GVT-g detected.\n"); > } > =20 > -bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv) > +bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv) > { > - return dev_priv->vgpu.caps & VGT_CAPS_FULL_48BIT_PPGTT; > + return dev_priv->vgpu.caps & VGT_CAPS_FULL_PPGTT; > } > =20 > struct _balloon_info_ { > diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915= _vgpu.h > index 551acc390046..ebe1b7bced98 100644 > --- a/drivers/gpu/drm/i915/i915_vgpu.h > +++ b/drivers/gpu/drm/i915/i915_vgpu.h > @@ -28,7 +28,7 @@ > =20 > void i915_check_vgpu(struct drm_i915_private *dev_priv); > =20 > -bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv); > +bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv); > =20 > static inline bool > intel_vgpu_has_hwsp_emulation(struct drm_i915_private *dev_priv) > --=20 > 2.20.1 >=20 --=20 Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 --ghzN8eJ9Qlbqn3iT Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iF0EARECAB0WIQTXuabgHDW6LPt9CICxBBozTXgYJwUCXIsKzAAKCRCxBBozTXgY J9hJAJ9w/AqlNVgVZPzvC5IGfQkOMEWW4QCeJhtCemhsjYSWSijnTZh0OZJj05A= =qsJG -----END PGP SIGNATURE----- --ghzN8eJ9Qlbqn3iT-- --===============1622355743== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4 --===============1622355743==--