From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDF96C43381 for ; Fri, 15 Mar 2019 10:25:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BBFF5218AC for ; Fri, 15 Mar 2019 10:25:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728847AbfCOKZZ convert rfc822-to-8bit (ORCPT ); Fri, 15 Mar 2019 06:25:25 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:46502 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727938AbfCOKZY (ORCPT ); Fri, 15 Mar 2019 06:25:24 -0400 Received: from localhost (unknown [IPv6:2a01:e0a:2c:6930:5cf4:84a1:2763:fe0d]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: bbrezillon) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id B99BB27E7AF; Fri, 15 Mar 2019 10:25:22 +0000 (GMT) Date: Fri, 15 Mar 2019 11:25:19 +0100 From: Boris Brezillon To: Michel =?UTF-8?B?RMOkbnplcg==?= Cc: Helen Koike , Tomasz Figa , =?UTF-8?B?U3TDqXBoYW5l?= Marchesin , Sean Paul , David Airlie , Daniel Vetter , Linux Kernel Mailing List , dri-devel , "open list:ARM/Rockchip SoC..." , "list@263.net:IOMMU DRIVERS" , kernel@collabora.com, nicholas.kazlauskas@amd.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 1/5] drm/rockchip: fix fb references in async update Message-ID: <20190315112519.0af4fdc0@collabora.com> In-Reply-To: <61b8420e-9b63-b67f-e9a8-fb8a0cb7d219@daenzer.net> References: <20190312022204.2775-1-helen.koike@collabora.com> <20190312022204.2775-2-helen.koike@collabora.com> <20190312073438.05ad8173@collabora.com> <20190312165243.5b771e4a@collabora.com> <05750143-708b-b84e-af67-82ec6815bd89@daenzer.net> <61b8420e-9b63-b67f-e9a8-fb8a0cb7d219@daenzer.net> Organization: Collabora X-Mailer: Claws Mail 3.17.3 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 15 Mar 2019 11:11:36 +0100 Michel Dänzer wrote: > On 2019-03-14 6:51 p.m., Helen Koike wrote: > > On 3/14/19 6:15 AM, Michel Dänzer wrote: > >> On 2019-03-13 7:08 p.m., Helen Koike wrote: > >>> On 3/13/19 6:58 AM, Michel Dänzer wrote: > >>>> On 2019-03-13 4:42 a.m., Tomasz Figa wrote: > >>>>> On Wed, Mar 13, 2019 at 12:52 AM Boris Brezillon > >>>>> wrote: > >>>>>> On Tue, 12 Mar 2019 12:34:45 -0300 > >>>>>> Helen Koike wrote: > >>>>>>> On 3/12/19 3:34 AM, Boris Brezillon wrote: > >>>>>>>> On Mon, 11 Mar 2019 23:21:59 -0300 > >>>>>>>> Helen Koike wrote: > >>>>>>>> > >>>>>>>>> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > >>>>>>>>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > >>>>>>>>> @@ -912,30 +912,31 @@ static void vop_plane_atomic_async_update(struct drm_plane *plane, > >>>>>>>>> struct drm_plane_state *new_state) > >>>>>>>>> { > >>>>>>>>> struct vop *vop = to_vop(plane->state->crtc); > >>>>>>>>> - struct drm_plane_state *plane_state; > >>>>>>>>> + struct drm_framebuffer *old_fb = plane->state->fb; > >>>>>>>>> > >>>>>>>>> - plane_state = plane->funcs->atomic_duplicate_state(plane); > >>>>>>>>> - plane_state->crtc_x = new_state->crtc_x; > >>>>>>>>> - plane_state->crtc_y = new_state->crtc_y; > >>>>>>>>> - plane_state->crtc_h = new_state->crtc_h; > >>>>>>>>> - plane_state->crtc_w = new_state->crtc_w; > >>>>>>>>> - plane_state->src_x = new_state->src_x; > >>>>>>>>> - plane_state->src_y = new_state->src_y; > >>>>>>>>> - plane_state->src_h = new_state->src_h; > >>>>>>>>> - plane_state->src_w = new_state->src_w; > >>>>>>>>> - > >>>>>>>>> - if (plane_state->fb != new_state->fb) > >>>>>>>>> - drm_atomic_set_fb_for_plane(plane_state, new_state->fb); > >>>>>>>>> - > >>>>>>>>> - swap(plane_state, plane->state); > >>>>>>>>> - > >>>>>>>>> - if (plane->state->fb && plane->state->fb != new_state->fb) { > >>>>>>>>> + /* > >>>>>>>>> + * A scanout can still be occurring, so we can't drop the reference to > >>>>>>>>> + * the old framebuffer. To solve this we get a reference to old_fb and > >>>>>>>>> + * set a worker to release it later. > >>>>>>>> > >>>>>>>> Hm, doesn't look like an async update to me if we have to wait for the > >>>>>>>> next VBLANK to happen to get the new content on the screen. Maybe we > >>>>>>>> should reject async updates when old_fb != new_fb in the rk > >>>>>>>> ->async_check() hook. > >>>>>>> > >>>>>>> Unless I am misunderstanding this, we don't wait here, we just grab a > >>>>>>> reference to the fb in case it is being still used by the hw, so it > >>>>>>> doesn't get released prematurely. > >>>>>> > >>>>>> I was just reacting to the comment that says the new FB should stay > >>>>>> around until the next VBLANK event happens. If the FB must stay around > >>>>>> that probably means the HW is still using, which made me wonder if this > >>>>>> HW actually supports async update (where async means "update now and > >>>>>> don't care about about tearing"). Or maybe it takes some time to switch > >>>>>> to the new FB and waiting for the next VBLANK to release the old FB was > >>>>>> an easy solution to not wait for the flip to actually happen in > >>>>>> ->async_update() (which is kind of a combination of async+non-blocking). > >>>>> > >>>>> The hardware switches framebuffers on vblank, so whatever framebuffer > >>>>> is currently being scanned out from needs to stay there until the > >>>>> hardware switches to the new one in shadow registers. If that doesn't > >>>>> happen, you get IOMMU faults and the display controller stops working > >>>>> since we don't have any fault handling currently, just printing a > >>>>> message. > >>>> > >>>> Sounds like your hardware doesn't actually support async flips. It's > >>>> probably better for the driver not to pretend otherwise. > >>> > >>> I think wee need to clarify the meaning of the async_update callback > >>> (and we should clarify it in the docs). > >>> > >>> The way I understand what the async_update callback should do is: don't > >>> block (i.e. don't wait for the next vblank), > >> > >> Note that those are two separate things. "Async flips" are about "don't > >> wait for vblank", not about "don't block". > >> > >> > >>> and update the hw state at some point with the latest state from the > >>> last call to async_update. > >>> > >>> Which means that: any driver can implement the async_update callback, > >>> independently if it supports changing its state right away or not. > >>> If hw supports, async_update can change the hw state right away, if not, > >>> then changes will be applied in the next vblank (it can even amend the > >>> pending commit if there is one). > >>> With this, we can remove all the legacy cursor code to use the > >>> async_update callback, since async_update can be called 100 times before > >>> the next vblank, and the latest state will be set to the hw without > >>> waiting 100 vblanks. > >>> > >>> Please, let me know if this is your understanding as well. If not, then > >>> we need to remodel things. > >> > >> While this may make sense for cursor updates, I don't think it does for > >> async flips. If the flip only actually takes effect during the next > >> vblank, it doesn't really fit the definition and userspace expectation > >> of an async flip. It's better to clearly communicate to userspace that > >> the hardware cannot do async flips, than to pretend it can and fake > >> them. Userspace has to deal with this anyway, since async flips weren't > >> always supported in general. > > > > What do you think if we separate two concepts here: > > > > - amend mode: works like cursor updates, i.e, update the hw state at > > some point with the latest state from the last call to async_update. No > > special hardware support is required. > > > > - async update: update hw state immediately. This depends if the hw > > supports it or not. > > > > Every async update is an amend, but the opposite is not necessarily true. > > > > What do you think if we rename the current async_update to amend_update, > > and we add a parameter "force_async" to it? (or maybe > > force_immediate_update?) > > Then amend_check with force_async=1 would fail if the hardware doesn't > > support it (we could also add flags in the capabilities to inform > > userspace the expected behaviour of things and if the hw supports > > force_sync). > > > > Like this, we can implement the cursors using the amend_update (which is > > now called async_update), and async_flips with amend_update with > > force_async=1. > > Might force_async make sense for cursor updates as well? I thought some > hardware supported HW cursor updates outside of vblank, but I'm not sure. > > Without force_async, are cursor updates always applied to the hardware > on the next vblank, even if the pending commit is delayed further (e.g. > because a fence it depends on doesn't signal before vblank)? If cursor > updates can be delayed beyond the next vblank, that can result in bad > user experience. You mean you have 1. sync/regular update pending (waiting on a fence) 2. async update on top of #1 ? In that case I'd expect async_update to either fail with -EBUSY or fallback to a sync update, but #2 should never go before #1 because the plane state in #2 has been constructed from the expected state after #1 has been applied. Note that right now this situation cannot happen because we fallback to a sync update when ->hw_done of the previous commit is not signaled. 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[PATCH v2 1/5] drm/rockchip: fix fb references in async update Message-ID: <20190315112519.0af4fdc0@collabora.com> In-Reply-To: <61b8420e-9b63-b67f-e9a8-fb8a0cb7d219@daenzer.net> References: <20190312022204.2775-1-helen.koike@collabora.com> <20190312022204.2775-2-helen.koike@collabora.com> <20190312073438.05ad8173@collabora.com> <20190312165243.5b771e4a@collabora.com> <05750143-708b-b84e-af67-82ec6815bd89@daenzer.net> <61b8420e-9b63-b67f-e9a8-fb8a0cb7d219@daenzer.net> Organization: Collabora X-Mailer: Claws Mail 3.17.3 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190315_032526_870302_AAAB8C48 X-CRM114-Status: GOOD ( 38.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?B?U3TDqXBoYW5l?= Marchesin , Sean Paul , David Airlie , Daniel Vetter , Linux Kernel Mailing List , dri-devel , Tomasz Figa , "open list:ARM/Rockchip SoC..." , Helen Koike , "list@263.net:IOMMU DRIVERS" , kernel@collabora.com, nicholas.kazlauskas@amd.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gRnJpLCAxNSBNYXIgMjAxOSAxMToxMTozNiArMDEwMApNaWNoZWwgRMOkbnplciA8bWljaGVs QGRhZW56ZXIubmV0PiB3cm90ZToKCj4gT24gMjAxOS0wMy0xNCA2OjUxIHAubS4sIEhlbGVuIEtv aWtlIHdyb3RlOgo+ID4gT24gMy8xNC8xOSA2OjE1IEFNLCBNaWNoZWwgRMOkbnplciB3cm90ZTog IAo+ID4+IE9uIDIwMTktMDMtMTMgNzowOCBwLm0uLCBIZWxlbiBLb2lrZSB3cm90ZTogIAo+ID4+ PiBPbiAzLzEzLzE5IDY6NTggQU0sIE1pY2hlbCBEw6RuemVyIHdyb3RlOiAgCj4gPj4+PiBPbiAy MDE5LTAzLTEzIDQ6NDIgYS5tLiwgVG9tYXN6IEZpZ2Egd3JvdGU6ICAKPiA+Pj4+PiBPbiBXZWQs IE1hciAxMywgMjAxOSBhdCAxMjo1MiBBTSBCb3JpcyBCcmV6aWxsb24KPiA+Pj4+PiA8Ym9yaXMu YnJlemlsbG9uQGNvbGxhYm9yYS5jb20+IHdyb3RlOiAgCj4gPj4+Pj4+IE9uIFR1ZSwgMTIgTWFy IDIwMTkgMTI6MzQ6NDUgLTAzMDAKPiA+Pj4+Pj4gSGVsZW4gS29pa2UgPGhlbGVuLmtvaWtlQGNv bGxhYm9yYS5jb20+IHdyb3RlOiAgCj4gPj4+Pj4+PiBPbiAzLzEyLzE5IDM6MzQgQU0sIEJvcmlz IEJyZXppbGxvbiB3cm90ZTogIAo+ID4+Pj4+Pj4+IE9uIE1vbiwgMTEgTWFyIDIwMTkgMjM6MjE6 NTkgLTAzMDAKPiA+Pj4+Pj4+PiBIZWxlbiBLb2lrZSA8aGVsZW4ua29pa2VAY29sbGFib3JhLmNv bT4gd3JvdGU6Cj4gPj4+Pj4+Pj4gIAo+ID4+Pj4+Pj4+PiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0v cm9ja2NoaXAvcm9ja2NoaXBfZHJtX3ZvcC5jCj4gPj4+Pj4+Pj4+ICsrKyBiL2RyaXZlcnMvZ3B1 L2RybS9yb2NrY2hpcC9yb2NrY2hpcF9kcm1fdm9wLmMKPiA+Pj4+Pj4+Pj4gQEAgLTkxMiwzMCAr OTEyLDMxIEBAIHN0YXRpYyB2b2lkIHZvcF9wbGFuZV9hdG9taWNfYXN5bmNfdXBkYXRlKHN0cnVj dCBkcm1fcGxhbmUgKnBsYW5lLAo+ID4+Pj4+Pj4+PiAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgc3RydWN0IGRybV9wbGFuZV9zdGF0ZSAqbmV3X3N0YXRlKQo+ID4+Pj4+Pj4+ PiAgewo+ID4+Pj4+Pj4+PiAgICBzdHJ1Y3Qgdm9wICp2b3AgPSB0b192b3AocGxhbmUtPnN0YXRl LT5jcnRjKTsKPiA+Pj4+Pj4+Pj4gLSAgc3RydWN0IGRybV9wbGFuZV9zdGF0ZSAqcGxhbmVfc3Rh dGU7Cj4gPj4+Pj4+Pj4+ICsgIHN0cnVjdCBkcm1fZnJhbWVidWZmZXIgKm9sZF9mYiA9IHBsYW5l LT5zdGF0ZS0+ZmI7Cj4gPj4+Pj4+Pj4+Cj4gPj4+Pj4+Pj4+IC0gIHBsYW5lX3N0YXRlID0gcGxh bmUtPmZ1bmNzLT5hdG9taWNfZHVwbGljYXRlX3N0YXRlKHBsYW5lKTsKPiA+Pj4+Pj4+Pj4gLSAg cGxhbmVfc3RhdGUtPmNydGNfeCA9IG5ld19zdGF0ZS0+Y3J0Y194Owo+ID4+Pj4+Pj4+PiAtICBw bGFuZV9zdGF0ZS0+Y3J0Y195ID0gbmV3X3N0YXRlLT5jcnRjX3k7Cj4gPj4+Pj4+Pj4+IC0gIHBs YW5lX3N0YXRlLT5jcnRjX2ggPSBuZXdfc3RhdGUtPmNydGNfaDsKPiA+Pj4+Pj4+Pj4gLSAgcGxh bmVfc3RhdGUtPmNydGNfdyA9IG5ld19zdGF0ZS0+Y3J0Y193Owo+ID4+Pj4+Pj4+PiAtICBwbGFu ZV9zdGF0ZS0+c3JjX3ggPSBuZXdfc3RhdGUtPnNyY194Owo+ID4+Pj4+Pj4+PiAtICBwbGFuZV9z dGF0ZS0+c3JjX3kgPSBuZXdfc3RhdGUtPnNyY195Owo+ID4+Pj4+Pj4+PiAtICBwbGFuZV9zdGF0 ZS0+c3JjX2ggPSBuZXdfc3RhdGUtPnNyY19oOwo+ID4+Pj4+Pj4+PiAtICBwbGFuZV9zdGF0ZS0+ c3JjX3cgPSBuZXdfc3RhdGUtPnNyY193Owo+ID4+Pj4+Pj4+PiAtCj4gPj4+Pj4+Pj4+IC0gIGlm IChwbGFuZV9zdGF0ZS0+ZmIgIT0gbmV3X3N0YXRlLT5mYikKPiA+Pj4+Pj4+Pj4gLSAgICAgICAg ICBkcm1fYXRvbWljX3NldF9mYl9mb3JfcGxhbmUocGxhbmVfc3RhdGUsIG5ld19zdGF0ZS0+ZmIp Owo+ID4+Pj4+Pj4+PiAtCj4gPj4+Pj4+Pj4+IC0gIHN3YXAocGxhbmVfc3RhdGUsIHBsYW5lLT5z dGF0ZSk7Cj4gPj4+Pj4+Pj4+IC0KPiA+Pj4+Pj4+Pj4gLSAgaWYgKHBsYW5lLT5zdGF0ZS0+ZmIg JiYgcGxhbmUtPnN0YXRlLT5mYiAhPSBuZXdfc3RhdGUtPmZiKSB7Cj4gPj4+Pj4+Pj4+ICsgIC8q Cj4gPj4+Pj4+Pj4+ICsgICAqIEEgc2Nhbm91dCBjYW4gc3RpbGwgYmUgb2NjdXJyaW5nLCBzbyB3 ZSBjYW4ndCBkcm9wIHRoZSByZWZlcmVuY2UgdG8KPiA+Pj4+Pj4+Pj4gKyAgICogdGhlIG9sZCBm cmFtZWJ1ZmZlci4gVG8gc29sdmUgdGhpcyB3ZSBnZXQgYSByZWZlcmVuY2UgdG8gb2xkX2ZiIGFu ZAo+ID4+Pj4+Pj4+PiArICAgKiBzZXQgYSB3b3JrZXIgdG8gcmVsZWFzZSBpdCBsYXRlci4gIAo+ ID4+Pj4+Pj4+Cj4gPj4+Pj4+Pj4gSG0sIGRvZXNuJ3QgbG9vayBsaWtlIGFuIGFzeW5jIHVwZGF0 ZSB0byBtZSBpZiB3ZSBoYXZlIHRvIHdhaXQgZm9yIHRoZQo+ID4+Pj4+Pj4+IG5leHQgVkJMQU5L IHRvIGhhcHBlbiB0byBnZXQgdGhlIG5ldyBjb250ZW50IG9uIHRoZSBzY3JlZW4uIE1heWJlIHdl Cj4gPj4+Pj4+Pj4gc2hvdWxkIHJlamVjdCBhc3luYyB1cGRhdGVzIHdoZW4gb2xkX2ZiICE9IG5l d19mYiBpbiB0aGUgcmsgIAo+ID4+Pj4+Pj4+IC0+YXN5bmNfY2hlY2soKSBob29rLiAgCj4gPj4+ Pj4+Pgo+ID4+Pj4+Pj4gVW5sZXNzIEkgYW0gbWlzdW5kZXJzdGFuZGluZyB0aGlzLCB3ZSBkb24n dCB3YWl0IGhlcmUsIHdlIGp1c3QgZ3JhYiBhCj4gPj4+Pj4+PiByZWZlcmVuY2UgdG8gdGhlIGZi IGluIGNhc2UgaXQgaXMgYmVpbmcgc3RpbGwgdXNlZCBieSB0aGUgaHcsIHNvIGl0Cj4gPj4+Pj4+ PiBkb2Vzbid0IGdldCByZWxlYXNlZCBwcmVtYXR1cmVseS4gIAo+ID4+Pj4+Pgo+ID4+Pj4+PiBJ IHdhcyBqdXN0IHJlYWN0aW5nIHRvIHRoZSBjb21tZW50IHRoYXQgc2F5cyB0aGUgbmV3IEZCIHNo b3VsZCBzdGF5Cj4gPj4+Pj4+IGFyb3VuZCB1bnRpbCB0aGUgbmV4dCBWQkxBTksgZXZlbnQgaGFw cGVucy4gSWYgdGhlIEZCIG11c3Qgc3RheSBhcm91bmQKPiA+Pj4+Pj4gdGhhdCBwcm9iYWJseSBt ZWFucyB0aGUgSFcgaXMgc3RpbGwgdXNpbmcsIHdoaWNoIG1hZGUgbWUgd29uZGVyIGlmIHRoaXMK PiA+Pj4+Pj4gSFcgYWN0dWFsbHkgc3VwcG9ydHMgYXN5bmMgdXBkYXRlICh3aGVyZSBhc3luYyBt ZWFucyAidXBkYXRlIG5vdyBhbmQKPiA+Pj4+Pj4gZG9uJ3QgY2FyZSBhYm91dCBhYm91dCB0ZWFy aW5nIikuIE9yIG1heWJlIGl0IHRha2VzIHNvbWUgdGltZSB0byBzd2l0Y2gKPiA+Pj4+Pj4gdG8g dGhlIG5ldyBGQiBhbmQgd2FpdGluZyBmb3IgdGhlIG5leHQgVkJMQU5LIHRvIHJlbGVhc2UgdGhl IG9sZCBGQiB3YXMKPiA+Pj4+Pj4gYW4gZWFzeSBzb2x1dGlvbiB0byBub3Qgd2FpdCBmb3IgdGhl IGZsaXAgdG8gYWN0dWFsbHkgaGFwcGVuIGluICAKPiA+Pj4+Pj4gLT5hc3luY191cGRhdGUoKSAo d2hpY2ggaXMga2luZCBvZiBhIGNvbWJpbmF0aW9uIG9mIGFzeW5jK25vbi1ibG9ja2luZykuICAK PiA+Pj4+Pgo+ID4+Pj4+IFRoZSBoYXJkd2FyZSBzd2l0Y2hlcyBmcmFtZWJ1ZmZlcnMgb24gdmJs YW5rLCBzbyB3aGF0ZXZlciBmcmFtZWJ1ZmZlcgo+ID4+Pj4+IGlzIGN1cnJlbnRseSBiZWluZyBz Y2FubmVkIG91dCBmcm9tIG5lZWRzIHRvIHN0YXkgdGhlcmUgdW50aWwgdGhlCj4gPj4+Pj4gaGFy ZHdhcmUgc3dpdGNoZXMgdG8gdGhlIG5ldyBvbmUgaW4gc2hhZG93IHJlZ2lzdGVycy4gSWYgdGhh dCBkb2Vzbid0Cj4gPj4+Pj4gaGFwcGVuLCB5b3UgZ2V0IElPTU1VIGZhdWx0cyBhbmQgdGhlIGRp c3BsYXkgY29udHJvbGxlciBzdG9wcyB3b3JraW5nCj4gPj4+Pj4gc2luY2Ugd2UgZG9uJ3QgaGF2 ZSBhbnkgZmF1bHQgaGFuZGxpbmcgY3VycmVudGx5LCBqdXN0IHByaW50aW5nIGEKPiA+Pj4+PiBt ZXNzYWdlLiAgCj4gPj4+Pgo+ID4+Pj4gU291bmRzIGxpa2UgeW91ciBoYXJkd2FyZSBkb2Vzbid0 IGFjdHVhbGx5IHN1cHBvcnQgYXN5bmMgZmxpcHMuIEl0J3MKPiA+Pj4+IHByb2JhYmx5IGJldHRl ciBmb3IgdGhlIGRyaXZlciBub3QgdG8gcHJldGVuZCBvdGhlcndpc2UuICAKPiA+Pj4KPiA+Pj4g SSB0aGluayB3ZWUgbmVlZCB0byBjbGFyaWZ5IHRoZSBtZWFuaW5nIG9mIHRoZSBhc3luY191cGRh dGUgY2FsbGJhY2sKPiA+Pj4gKGFuZCB3ZSBzaG91bGQgY2xhcmlmeSBpdCBpbiB0aGUgZG9jcyku Cj4gPj4+Cj4gPj4+IFRoZSB3YXkgSSB1bmRlcnN0YW5kIHdoYXQgdGhlIGFzeW5jX3VwZGF0ZSBj YWxsYmFjayBzaG91bGQgZG8gaXM6IGRvbid0Cj4gPj4+IGJsb2NrIChpLmUuIGRvbid0IHdhaXQg Zm9yIHRoZSBuZXh0IHZibGFuayksICAKPiA+Pgo+ID4+IE5vdGUgdGhhdCB0aG9zZSBhcmUgdHdv IHNlcGFyYXRlIHRoaW5ncy4gIkFzeW5jIGZsaXBzIiBhcmUgYWJvdXQgImRvbid0Cj4gPj4gd2Fp dCBmb3IgdmJsYW5rIiwgbm90IGFib3V0ICJkb24ndCBibG9jayIuCj4gPj4KPiA+PiAgCj4gPj4+ IGFuZCB1cGRhdGUgdGhlIGh3IHN0YXRlIGF0IHNvbWUgcG9pbnQgd2l0aCB0aGUgbGF0ZXN0IHN0 YXRlIGZyb20gdGhlCj4gPj4+IGxhc3QgY2FsbCB0byBhc3luY191cGRhdGUuCj4gPj4+Cj4gPj4+ IFdoaWNoIG1lYW5zIHRoYXQ6IGFueSBkcml2ZXIgY2FuIGltcGxlbWVudCB0aGUgYXN5bmNfdXBk YXRlIGNhbGxiYWNrLAo+ID4+PiBpbmRlcGVuZGVudGx5IGlmIGl0IHN1cHBvcnRzIGNoYW5naW5n IGl0cyBzdGF0ZSByaWdodCBhd2F5IG9yIG5vdC4KPiA+Pj4gSWYgaHcgc3VwcG9ydHMsIGFzeW5j X3VwZGF0ZSBjYW4gY2hhbmdlIHRoZSBodyBzdGF0ZSByaWdodCBhd2F5LCBpZiBub3QsCj4gPj4+ IHRoZW4gY2hhbmdlcyB3aWxsIGJlIGFwcGxpZWQgaW4gdGhlIG5leHQgdmJsYW5rIChpdCBjYW4g ZXZlbiBhbWVuZCB0aGUKPiA+Pj4gcGVuZGluZyBjb21taXQgaWYgdGhlcmUgaXMgb25lKS4KPiA+ Pj4gV2l0aCB0aGlzLCB3ZSBjYW4gcmVtb3ZlIGFsbCB0aGUgbGVnYWN5IGN1cnNvciBjb2RlIHRv IHVzZSB0aGUKPiA+Pj4gYXN5bmNfdXBkYXRlIGNhbGxiYWNrLCBzaW5jZSBhc3luY191cGRhdGUg Y2FuIGJlIGNhbGxlZCAxMDAgdGltZXMgYmVmb3JlCj4gPj4+IHRoZSBuZXh0IHZibGFuaywgYW5k IHRoZSBsYXRlc3Qgc3RhdGUgd2lsbCBiZSBzZXQgdG8gdGhlIGh3IHdpdGhvdXQKPiA+Pj4gd2Fp dGluZyAxMDAgdmJsYW5rcy4KPiA+Pj4KPiA+Pj4gUGxlYXNlLCBsZXQgbWUga25vdyBpZiB0aGlz IGlzIHlvdXIgdW5kZXJzdGFuZGluZyBhcyB3ZWxsLiBJZiBub3QsIHRoZW4KPiA+Pj4gd2UgbmVl ZCB0byByZW1vZGVsIHRoaW5ncy4gIAo+ID4+Cj4gPj4gV2hpbGUgdGhpcyBtYXkgbWFrZSBzZW5z ZSBmb3IgY3Vyc29yIHVwZGF0ZXMsIEkgZG9uJ3QgdGhpbmsgaXQgZG9lcyBmb3IKPiA+PiBhc3lu YyBmbGlwcy4gSWYgdGhlIGZsaXAgb25seSBhY3R1YWxseSB0YWtlcyBlZmZlY3QgZHVyaW5nIHRo ZSBuZXh0Cj4gPj4gdmJsYW5rLCBpdCBkb2Vzbid0IHJlYWxseSBmaXQgdGhlIGRlZmluaXRpb24g YW5kIHVzZXJzcGFjZSBleHBlY3RhdGlvbgo+ID4+IG9mIGFuIGFzeW5jIGZsaXAuIEl0J3MgYmV0 dGVyIHRvIGNsZWFybHkgY29tbXVuaWNhdGUgdG8gdXNlcnNwYWNlIHRoYXQKPiA+PiB0aGUgaGFy ZHdhcmUgY2Fubm90IGRvIGFzeW5jIGZsaXBzLCB0aGFuIHRvIHByZXRlbmQgaXQgY2FuIGFuZCBm YWtlCj4gPj4gdGhlbS4gVXNlcnNwYWNlIGhhcyB0byBkZWFsIHdpdGggdGhpcyBhbnl3YXksIHNp bmNlIGFzeW5jIGZsaXBzIHdlcmVuJ3QKPiA+PiBhbHdheXMgc3VwcG9ydGVkIGluIGdlbmVyYWwu ICAKPiA+IAo+ID4gV2hhdCBkbyB5b3UgdGhpbmsgaWYgd2Ugc2VwYXJhdGUgdHdvIGNvbmNlcHRz IGhlcmU6Cj4gPiAKPiA+IC0gYW1lbmQgbW9kZTogd29ya3MgbGlrZSBjdXJzb3IgdXBkYXRlcywg aS5lLCB1cGRhdGUgdGhlIGh3IHN0YXRlIGF0Cj4gPiBzb21lIHBvaW50IHdpdGggdGhlIGxhdGVz dCBzdGF0ZSBmcm9tIHRoZSBsYXN0IGNhbGwgdG8gYXN5bmNfdXBkYXRlLiBObwo+ID4gc3BlY2lh bCBoYXJkd2FyZSBzdXBwb3J0IGlzIHJlcXVpcmVkLgo+ID4gCj4gPiAtIGFzeW5jIHVwZGF0ZTog dXBkYXRlIGh3IHN0YXRlIGltbWVkaWF0ZWx5LiBUaGlzIGRlcGVuZHMgaWYgdGhlIGh3Cj4gPiBz dXBwb3J0cyBpdCBvciBub3QuCj4gPiAKPiA+IEV2ZXJ5IGFzeW5jIHVwZGF0ZSBpcyBhbiBhbWVu ZCwgYnV0IHRoZSBvcHBvc2l0ZSBpcyBub3QgbmVjZXNzYXJpbHkgdHJ1ZS4KPiA+IAo+ID4gV2hh dCBkbyB5b3UgdGhpbmsgaWYgd2UgcmVuYW1lIHRoZSBjdXJyZW50IGFzeW5jX3VwZGF0ZSB0byBh bWVuZF91cGRhdGUsCj4gPiBhbmQgd2UgYWRkIGEgcGFyYW1ldGVyICJmb3JjZV9hc3luYyIgdG8g aXQ/IChvciBtYXliZQo+ID4gZm9yY2VfaW1tZWRpYXRlX3VwZGF0ZT8pCj4gPiBUaGVuIGFtZW5k X2NoZWNrIHdpdGggZm9yY2VfYXN5bmM9MSB3b3VsZCBmYWlsIGlmIHRoZSBoYXJkd2FyZSBkb2Vz bid0Cj4gPiBzdXBwb3J0IGl0ICh3ZSBjb3VsZCBhbHNvIGFkZCBmbGFncyBpbiB0aGUgY2FwYWJp bGl0aWVzIHRvIGluZm9ybQo+ID4gdXNlcnNwYWNlIHRoZSBleHBlY3RlZCBiZWhhdmlvdXIgb2Yg dGhpbmdzIGFuZCBpZiB0aGUgaHcgc3VwcG9ydHMKPiA+IGZvcmNlX3N5bmMpLgo+ID4gCj4gPiBM aWtlIHRoaXMsIHdlIGNhbiBpbXBsZW1lbnQgdGhlIGN1cnNvcnMgdXNpbmcgdGhlIGFtZW5kX3Vw ZGF0ZSAod2hpY2ggaXMKPiA+IG5vdyBjYWxsZWQgYXN5bmNfdXBkYXRlKSwgYW5kIGFzeW5jX2Zs aXBzIHdpdGggYW1lbmRfdXBkYXRlIHdpdGgKPiA+IGZvcmNlX2FzeW5jPTEuICAKPiAKPiBNaWdo dCBmb3JjZV9hc3luYyBtYWtlIHNlbnNlIGZvciBjdXJzb3IgdXBkYXRlcyBhcyB3ZWxsPyBJIHRo b3VnaHQgc29tZQo+IGhhcmR3YXJlIHN1cHBvcnRlZCBIVyBjdXJzb3IgdXBkYXRlcyBvdXRzaWRl IG9mIHZibGFuaywgYnV0IEknbSBub3Qgc3VyZS4KPiAKPiBXaXRob3V0IGZvcmNlX2FzeW5jLCBh cmUgY3Vyc29yIHVwZGF0ZXMgYWx3YXlzIGFwcGxpZWQgdG8gdGhlIGhhcmR3YXJlCj4gb24gdGhl IG5leHQgdmJsYW5rLCBldmVuIGlmIHRoZSBwZW5kaW5nIGNvbW1pdCBpcyBkZWxheWVkIGZ1cnRo ZXIgKGUuZy4KPiBiZWNhdXNlIGEgZmVuY2UgaXQgZGVwZW5kcyBvbiBkb2Vzbid0IHNpZ25hbCBi ZWZvcmUgdmJsYW5rKT8gSWYgY3Vyc29yCj4gdXBkYXRlcyBjYW4gYmUgZGVsYXllZCBiZXlvbmQg dGhlIG5leHQgdmJsYW5rLCB0aGF0IGNhbiByZXN1bHQgaW4gYmFkCj4gdXNlciBleHBlcmllbmNl LgoKWW91IG1lYW4geW91IGhhdmUKCjEuIHN5bmMvcmVndWxhciB1cGRhdGUgcGVuZGluZyAod2Fp dGluZyBvbiBhIGZlbmNlKQoyLiBhc3luYyB1cGRhdGUgb24gdG9wIG9mICMxCgo/CgpJbiB0aGF0 IGNhc2UgSSdkIGV4cGVjdCBhc3luY191cGRhdGUgdG8gZWl0aGVyIGZhaWwgd2l0aCAtRUJVU1kg b3IKZmFsbGJhY2sgdG8gYSBzeW5jIHVwZGF0ZSwgYnV0ICMyIHNob3VsZCBuZXZlciBnbyBiZWZv cmUgIzEgYmVjYXVzZSB0aGUKcGxhbmUgc3RhdGUgaW4gIzIgaGFzIGJlZW4gY29uc3RydWN0ZWQg ZnJvbSB0aGUgZXhwZWN0ZWQgc3RhdGUgYWZ0ZXIgIzEKaGFzIGJlZW4gYXBwbGllZC4KCk5vdGUg dGhhdCByaWdodCBub3cgdGhpcyBzaXR1YXRpb24gY2Fubm90IGhhcHBlbiBiZWNhdXNlIHdlIGZh bGxiYWNrIHRvCmEgc3luYyB1cGRhdGUgd2hlbiAtPmh3X2RvbmUgb2YgdGhlIHByZXZpb3VzIGNv bW1pdCBpcyBub3Qgc2lnbmFsZWQuCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2Vy bmVsQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1h bi9saXN0aW5mby9saW51eC1hcm0ta2VybmVsCg==