From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Mon, 18 Mar 2019 06:20:56 +0100 Subject: [U-Boot] [PATCH 2/3] clk: renesas: Fix swapped div and mul in debug output on Gen2 In-Reply-To: <20190318052057.25756-1-marek.vasut+renesas@gmail.com> References: <20190318052057.25756-1-marek.vasut+renesas@gmail.com> Message-ID: <20190318052057.25756-2-marek.vasut+renesas@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de The $div and $mul values were swapped in the debug output, fix this. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- drivers/clk/renesas/clk-rcar-gen2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c index aedaab723b..34abe784fd 100644 --- a/drivers/clk/renesas/clk-rcar-gen2.c +++ b/drivers/clk/renesas/clk-rcar-gen2.c @@ -121,7 +121,7 @@ static ulong gen2_clk_get_rate(struct clk *clk) case CLK_TYPE_FF: rate = (gen2_clk_get_rate(&parent) * core->mult) / core->div; - debug("%s[%i] FIXED clk: parent=%i div=%i mul=%i => rate=%u\n", + debug("%s[%i] FIXED clk: parent=%i mul=%i div=%i => rate=%u\n", __func__, __LINE__, core->parent, core->mult, core->div, rate); return rate; -- 2.20.1