From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 472E8C43381 for ; Mon, 18 Mar 2019 17:16:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DD84320863 for ; Mon, 18 Mar 2019 17:16:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="fT6bYTM8" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727336AbfCRRQF (ORCPT ); Mon, 18 Mar 2019 13:16:05 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:57717 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726626AbfCRRQF (ORCPT ); Mon, 18 Mar 2019 13:16:05 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=4tXraGqKKthPvVqtNCzZnv+T059yEggJtseGFuhFvn0=; b=fT6bYTM8pnL1djdDavqSxj3C9A HcpkVM875cds7lUDxRf5zbH7L35zv8W+SjiqEyhEBeC4FV0BUK42A6CWcXvs5VptoRn93BJv6Bbif 5MgSTtWAXEVvvEQT5Ylibo0fie59aOmfWVl4XFMb/yInhHErTAH/gW8FH5ksDsr+ouHw=; Received: from andrew by vps0.lunn.ch with local (Exim 4.89) (envelope-from ) id 1h5vrg-00070l-GL; Mon, 18 Mar 2019 18:15:56 +0100 Date: Mon, 18 Mar 2019 18:15:56 +0100 From: Andrew Lunn To: Florian Fainelli Cc: Phil Reid , netdev@vger.kernel.org, "David S. Miller" , dongsheng.wang@hxt-semitech.com, cphealy@gmail.com, clemens.gruber@pqgruber.com, hkallweit1@gmail.com, nbd@nbd.name, harini.katakam@xilinx.com Subject: Re: regression from: net: phy: marvell: Avoid unnecessary soft reset Message-ID: <20190318171556.GC23030@lunn.ch> References: <20180925182846.30042-1-f.fainelli@gmail.com> <20180925182846.30042-3-f.fainelli@gmail.com> <5ddf46b1-1959-832d-c6a5-86d8f93dc409@electromag.com.au> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org > Thanks, you mentioned a mv88e6085 but that chip is a 10/100 switch, did > you mean that the mv88e6085 compatible string is used in Device Tree to > designate that chip? While the 88E1540 driver is picked up, that driver > is originally for external PHY packages (AFAICT), so there could be some > switch-specific integration of this PHY that makes it behave > differently, having the OUI helps narrow down what might be necessary to > accomplish. > > FWIW, the changes were originally tested with a 88e6352. Hi Florian Some of the older Marvell switches use the 1540 for its internal PHYs. Same OUI as the external PHY. I don't remember which switches. Maybe the mv88e6161 in the RDU1? Andrew