From mboxrd@z Thu Jan 1 00:00:00 1970 From: tien.fong.chee at intel.com Date: Tue, 19 Mar 2019 16:50:14 +0800 Subject: [U-Boot] [PATCH v12 4/9] ARM: socfpga: Moving the watchdog reset to the for-loop status polling In-Reply-To: <20190319085019.6647-1-tien.fong.chee@intel.com> References: <20190319085019.6647-1-tien.fong.chee@intel.com> Message-ID: <20190319085019.6647-5-tien.fong.chee@intel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Tien Fong Chee Ensure the watchdog is reset timely on each status polling. Signed-off-by: Tien Fong Chee --- changes for v12 - Improved the commit messages. changes for v11 - No changes. changes for v10 - This patch was split out from [PATCH v10 5/9] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA. --- drivers/fpga/socfpga_arria10.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c index b0abe1955c..9499d1a014 100644 --- a/drivers/fpga/socfpga_arria10.c +++ b/drivers/fpga/socfpga_arria10.c @@ -360,6 +360,7 @@ static int fpgamgr_program_poll_cd(void) printf("nstatus == 0 while waiting for condone\n"); return -EPERM; } + WATCHDOG_RESET(); } if (i == FPGA_TIMEOUT_CNT) @@ -433,7 +434,6 @@ int fpgamgr_program_finish(void) printf("FPGA: Poll CD failed with error code %d\n", status); return -EPERM; } - WATCHDOG_RESET(); /* Ensure the FPGA entering user mode */ status = fpgamgr_program_poll_usermode(); -- 2.13.0