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[2003:dc:d739:9900:39ee:7385:1514:9d3e]) by smtp.googlemail.com with ESMTPSA id c8sm56050wrx.6.2019.03.19.14.51.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Mar 2019 14:51:59 -0700 (PDT) From: Martin Blumenstingl To: narmstrong@baylibre.com, jbrunet@baylibre.com, linux-amlogic@lists.infradead.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 0/4] clk: meson8b: add the VPU clock tree Date: Tue, 19 Mar 2019 22:51:17 +0100 Message-Id: <20190319215121.29340-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds the VPU clock tree for Meson8, Meson8b and Meson8m2. The VPU clock tree is slightly different on all three SoCs. The details are explained in patch #4. Meson8m2 requires the previously unsupported "gp_pll" PLL. This PLL only exists on Meson8m2 - Meson8 and Meson8b don't have it. A separate clk_hw_onecell_data is introduced for Meson8m2 (using the compatible string which is already available) to account for this SoC specific clock setup. dependencies: This series is meant to be applied on top of my other patch from [0]: dt-bindings: clock: meson8b: drop the "ABP" clock definition [0] https://patchwork.kernel.org/patch/10860387/ Martin Blumenstingl (4): dt-bindings: clock: meson8b: export the VPU clock clk: meson: meson8b: use a sparate clock table for Meson8m2 clk: meson: meson8b: add support for the GP_PLL clock on Meson8m2 clk: meson: meson8b: add the VPU clock trees drivers/clk/meson/meson8b.c | 422 ++++++++++++++++++++++- drivers/clk/meson/meson8b.h | 12 +- include/dt-bindings/clock/meson8b-clkc.h | 1 + 3 files changed, 433 insertions(+), 2 deletions(-) -- 2.21.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDB46C10F03 for ; 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[2003:dc:d739:9900:39ee:7385:1514:9d3e]) by smtp.googlemail.com with ESMTPSA id c8sm56050wrx.6.2019.03.19.14.51.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Mar 2019 14:51:59 -0700 (PDT) From: Martin Blumenstingl To: narmstrong@baylibre.com, jbrunet@baylibre.com, linux-amlogic@lists.infradead.org Subject: [PATCH 0/4] clk: meson8b: add the VPU clock tree Date: Tue, 19 Mar 2019 22:51:17 +0100 Message-Id: <20190319215121.29340-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190319_145202_374292_CEDA03E8 X-CRM114-Status: GOOD ( 11.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org This adds the VPU clock tree for Meson8, Meson8b and Meson8m2. The VPU clock tree is slightly different on all three SoCs. The details are explained in patch #4. Meson8m2 requires the previously unsupported "gp_pll" PLL. This PLL only exists on Meson8m2 - Meson8 and Meson8b don't have it. A separate clk_hw_onecell_data is introduced for Meson8m2 (using the compatible string which is already available) to account for this SoC specific clock setup. dependencies: This series is meant to be applied on top of my other patch from [0]: dt-bindings: clock: meson8b: drop the "ABP" clock definition [0] https://patchwork.kernel.org/patch/10860387/ Martin Blumenstingl (4): dt-bindings: clock: meson8b: export the VPU clock clk: meson: meson8b: use a sparate clock table for Meson8m2 clk: meson: meson8b: add support for the GP_PLL clock on Meson8m2 clk: meson: meson8b: add the VPU clock trees drivers/clk/meson/meson8b.c | 422 ++++++++++++++++++++++- drivers/clk/meson/meson8b.h | 12 +- include/dt-bindings/clock/meson8b-clkc.h | 1 + 3 files changed, 433 insertions(+), 2 deletions(-) -- 2.21.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FBE1C4360F for ; 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[2003:dc:d739:9900:39ee:7385:1514:9d3e]) by smtp.googlemail.com with ESMTPSA id c8sm56050wrx.6.2019.03.19.14.51.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Mar 2019 14:51:59 -0700 (PDT) From: Martin Blumenstingl To: narmstrong@baylibre.com, jbrunet@baylibre.com, linux-amlogic@lists.infradead.org Subject: [PATCH 0/4] clk: meson8b: add the VPU clock tree Date: Tue, 19 Mar 2019 22:51:17 +0100 Message-Id: <20190319215121.29340-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190319_145202_374292_CEDA03E8 X-CRM114-Status: GOOD ( 11.37 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org This adds the VPU clock tree for Meson8, Meson8b and Meson8m2. The VPU clock tree is slightly different on all three SoCs. The details are explained in patch #4. Meson8m2 requires the previously unsupported "gp_pll" PLL. This PLL only exists on Meson8m2 - Meson8 and Meson8b don't have it. A separate clk_hw_onecell_data is introduced for Meson8m2 (using the compatible string which is already available) to account for this SoC specific clock setup. dependencies: This series is meant to be applied on top of my other patch from [0]: dt-bindings: clock: meson8b: drop the "ABP" clock definition [0] https://patchwork.kernel.org/patch/10860387/ Martin Blumenstingl (4): dt-bindings: clock: meson8b: export the VPU clock clk: meson: meson8b: use a sparate clock table for Meson8m2 clk: meson: meson8b: add support for the GP_PLL clock on Meson8m2 clk: meson: meson8b: add the VPU clock trees drivers/clk/meson/meson8b.c | 422 ++++++++++++++++++++++- drivers/clk/meson/meson8b.h | 12 +- include/dt-bindings/clock/meson8b-clkc.h | 1 + 3 files changed, 433 insertions(+), 2 deletions(-) -- 2.21.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic