* [PATCH 1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain @ 2019-03-21 7:37 Chris Wilson 2019-03-21 7:37 ` [PATCH 2/2] drm/i915/selftests: Mark up preemption tests for hang detection Chris Wilson ` (3 more replies) 0 siblings, 4 replies; 9+ messages in thread From: Chris Wilson @ 2019-03-21 7:37 UTC (permalink / raw) To: intel-gfx 32 is too many for the likes of kbl, and in order to insert that many requests into the ring requires us to declare the first few hung -- understandably a slow and unexpected process. Instead, measure the size of a singe requests and use that to estimate the upper bound on the chain length we can use for our test, remembering to flush the previous chain between tests for safety. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- drivers/gpu/drm/i915/selftests/intel_lrc.c | 40 ++++++++++++++++++++-- 1 file changed, 37 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/selftests/intel_lrc.c b/drivers/gpu/drm/i915/selftests/intel_lrc.c index d61520ea03c1..42068ed5eec0 100644 --- a/drivers/gpu/drm/i915/selftests/intel_lrc.c +++ b/drivers/gpu/drm/i915/selftests/intel_lrc.c @@ -615,14 +615,33 @@ static int live_chain_preempt(void *arg) struct i915_sched_attr attr = { .priority = I915_USER_PRIORITY(I915_PRIORITY_MAX), }; - int count, i; + struct i915_request *rq; + int ring_size, count, i; if (!intel_engine_has_preemption(engine)) continue; - for_each_prime_number_from(count, 1, 32) { /* must fit ring! */ - struct i915_request *rq; + rq = igt_spinner_create_request(&lo.spin, + lo.ctx, engine, + MI_ARB_CHECK); + if (IS_ERR(rq)) + goto err_wedged; + i915_request_add(rq); + + ring_size = rq->wa_tail - rq->head; + if (ring_size < 0) + ring_size += rq->ring->size; + ring_size = rq->ring->size / ring_size; + pr_debug("%s(%s): Using maximum of %d requests\n", + __func__, engine->name, ring_size); + igt_spinner_end(&lo.spin); + if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 2) < 0) { + pr_err("Timed out waiting to flush %s\n", engine->name); + goto err_wedged; + } + + for_each_prime_number_from(count, 1, ring_size) { rq = igt_spinner_create_request(&hi.spin, hi.ctx, engine, MI_ARB_CHECK); @@ -664,6 +683,21 @@ static int live_chain_preempt(void *arg) goto err_wedged; } igt_spinner_end(&lo.spin); + + rq = i915_request_alloc(engine, lo.ctx); + if (IS_ERR(rq)) + goto err_wedged; + i915_request_add(rq); + if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 5) < 0) { + struct drm_printer p = + drm_info_printer(i915->drm.dev); + + pr_err("Failed to flush low priority chain of %d requests\n", + count); + intel_engine_dump(engine, &p, + "%s\n", engine->name); + goto err_wedged; + } } } -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] drm/i915/selftests: Mark up preemption tests for hang detection 2019-03-21 7:37 [PATCH 1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain Chris Wilson @ 2019-03-21 7:37 ` Chris Wilson 2019-03-21 8:41 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain Patchwork ` (2 subsequent siblings) 3 siblings, 0 replies; 9+ messages in thread From: Chris Wilson @ 2019-03-21 7:37 UTC (permalink / raw) To: intel-gfx Use the igt_live_test framework for detecting whether an unwanted hang occurred during test execution, and report failure if it does. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/selftests/intel_lrc.c | 38 ++++++++++++++++++++-- 1 file changed, 35 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/selftests/intel_lrc.c b/drivers/gpu/drm/i915/selftests/intel_lrc.c index 42068ed5eec0..59bc39275589 100644 --- a/drivers/gpu/drm/i915/selftests/intel_lrc.c +++ b/drivers/gpu/drm/i915/selftests/intel_lrc.c @@ -10,6 +10,7 @@ #include "../i915_selftest.h" #include "igt_flush_test.h" +#include "igt_live_test.h" #include "igt_spinner.h" #include "i915_random.h" @@ -113,11 +114,17 @@ static int live_preempt(void *arg) I915_USER_PRIORITY(I915_CONTEXT_MIN_USER_PRIORITY); for_each_engine(engine, i915, id) { + struct igt_live_test t; struct i915_request *rq; if (!intel_engine_has_preemption(engine)) continue; + if (igt_live_test_begin(&t, i915, __func__, engine->name)) { + err = -EIO; + goto err_ctx_lo; + } + rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine, MI_ARB_CHECK); if (IS_ERR(rq)) { @@ -153,7 +160,8 @@ static int live_preempt(void *arg) igt_spinner_end(&spin_hi); igt_spinner_end(&spin_lo); - if (igt_flush_test(i915, I915_WAIT_LOCKED)) { + + if (igt_live_test_end(&t)) { err = -EIO; goto err_ctx_lo; } @@ -207,11 +215,17 @@ static int live_late_preempt(void *arg) goto err_ctx_hi; for_each_engine(engine, i915, id) { + struct igt_live_test t; struct i915_request *rq; if (!intel_engine_has_preemption(engine)) continue; + if (igt_live_test_begin(&t, i915, __func__, engine->name)) { + err = -EIO; + goto err_ctx_lo; + } + rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine, MI_ARB_CHECK); if (IS_ERR(rq)) { @@ -250,7 +264,8 @@ static int live_late_preempt(void *arg) igt_spinner_end(&spin_hi); igt_spinner_end(&spin_lo); - if (igt_flush_test(i915, I915_WAIT_LOCKED)) { + + if (igt_live_test_end(&t)) { err = -EIO; goto err_ctx_lo; } @@ -615,6 +630,7 @@ static int live_chain_preempt(void *arg) struct i915_sched_attr attr = { .priority = I915_USER_PRIORITY(I915_PRIORITY_MAX), }; + struct igt_live_test t; struct i915_request *rq; int ring_size, count, i; @@ -641,6 +657,11 @@ static int live_chain_preempt(void *arg) goto err_wedged; } + if (igt_live_test_begin(&t, i915, __func__, engine->name)) { + err = -EIO; + goto err_wedged; + } + for_each_prime_number_from(count, 1, ring_size) { rq = igt_spinner_create_request(&hi.spin, hi.ctx, engine, @@ -699,6 +720,11 @@ static int live_chain_preempt(void *arg) goto err_wedged; } } + + if (igt_live_test_end(&t)) { + err = -EIO; + goto err_wedged; + } } err = 0; @@ -1022,6 +1048,7 @@ static int live_preempt_smoke(void *arg) }; const unsigned int phase[] = { 0, BATCH }; intel_wakeref_t wakeref; + struct igt_live_test t; int err = -ENOMEM; u32 *cs; int n; @@ -1058,6 +1085,11 @@ static int live_preempt_smoke(void *arg) if (err) goto err_batch; + if (igt_live_test_begin(&t, smoke.i915, __func__, "all")) { + err = -EIO; + goto err_batch; + } + for (n = 0; n < smoke.ncontext; n++) { smoke.contexts[n] = kernel_context(smoke.i915); if (!smoke.contexts[n]) @@ -1075,7 +1107,7 @@ static int live_preempt_smoke(void *arg) } err_ctx: - if (igt_flush_test(smoke.i915, I915_WAIT_LOCKED)) + if (igt_live_test_end(&t)) err = -EIO; for (n = 0; n < smoke.ncontext; n++) { -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain 2019-03-21 7:37 [PATCH 1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain Chris Wilson 2019-03-21 7:37 ` [PATCH 2/2] drm/i915/selftests: Mark up preemption tests for hang detection Chris Wilson @ 2019-03-21 8:41 ` Patchwork 2019-03-21 17:07 ` ✓ Fi.CI.IGT: " Patchwork 2019-03-21 18:41 ` [PATCH 1/2] " Caz Yokoyama 3 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2019-03-21 8:41 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain URL : https://patchwork.freedesktop.org/series/58323/ State : success == Summary == CI Bug Log - changes from CI_DRM_5785 -> Patchwork_12541 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/58323/revisions/1/mbox/ Known issues ------------ Here are the changes found in Patchwork_12541 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live_uncore: - fi-ivb-3770: PASS -> DMESG-FAIL [fdo#110210] * igt@kms_frontbuffer_tracking@basic: - fi-byt-clapper: PASS -> FAIL [fdo#103167] * igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence: - fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362] * igt@runner@aborted: - fi-apl-guc: NOTRUN -> FAIL [fdo#108622] / [fdo#109720] #### Possible fixes #### * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS * igt@prime_vgem@basic-fence-flip: - fi-ilk-650: FAIL [fdo#104008] -> PASS [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#104008]: https://bugs.freedesktop.org/show_bug.cgi?id=104008 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622 [fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720 [fdo#110210]: https://bugs.freedesktop.org/show_bug.cgi?id=110210 Participating hosts (47 -> 39) ------------------------------ Missing (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus Build changes ------------- * Linux: CI_DRM_5785 -> Patchwork_12541 CI_DRM_5785: 1e3d80c25878b7d97ad6c0680a452d55baeb28e0 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4894: fedd92f4022837e2c20e472b65bd7d0849f484a3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12541: 01f352dfa5ee51e068470b6f5aec76a801d1b0f8 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 01f352dfa5ee drm/i915/selftests: Mark up preemption tests for hang detection 7b475529ebd9 drm/i915/selftests: Calculate maximum ring size for preemption chain == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12541/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain 2019-03-21 7:37 [PATCH 1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain Chris Wilson 2019-03-21 7:37 ` [PATCH 2/2] drm/i915/selftests: Mark up preemption tests for hang detection Chris Wilson 2019-03-21 8:41 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain Patchwork @ 2019-03-21 17:07 ` Patchwork 2019-03-21 18:41 ` [PATCH 1/2] " Caz Yokoyama 3 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2019-03-21 17:07 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain URL : https://patchwork.freedesktop.org/series/58323/ State : success == Summary == CI Bug Log - changes from CI_DRM_5785_full -> Patchwork_12541_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_12541_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_param@invalid-param-get: - shard-skl: NOTRUN -> FAIL [fdo#109559] * igt@gem_ctx_param@invalid-param-set: - shard-hsw: NOTRUN -> FAIL [fdo#109674] * igt@gem_exec_parallel@bsd1: - shard-skl: NOTRUN -> SKIP [fdo#109271] +122 * igt@gem_exec_schedule@deep-bsd: - shard-snb: NOTRUN -> SKIP [fdo#109271] +32 * igt@gem_pread@stolen-normal: - shard-iclb: NOTRUN -> SKIP [fdo#109277] * igt@gem_softpin@evict-snoop: - shard-iclb: NOTRUN -> SKIP [fdo#109312] * igt@i915_pm_lpsp@screens-disabled: - shard-iclb: NOTRUN -> SKIP [fdo#109301] * igt@kms_busy@extended-modeset-hang-newfb-render-a: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_busy@extended-pageflip-hang-newfb-render-d: - shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] * igt@kms_cursor_crc@cursor-512x512-dpms: - shard-iclb: NOTRUN -> SKIP [fdo#109279] * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size: - shard-iclb: NOTRUN -> SKIP [fdo#109274] +3 * igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled: - shard-skl: PASS -> FAIL [fdo#103184] * igt@kms_flip@flip-vs-suspend-interruptible: - shard-kbl: PASS -> DMESG-WARN [fdo#103313] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render: - shard-skl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt: - shard-iclb: PASS -> FAIL [fdo#103167] +5 * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt: - shard-iclb: PASS -> FAIL [fdo#109247] +17 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render: - shard-hsw: NOTRUN -> SKIP [fdo#109271] +23 * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-cpu: - shard-iclb: NOTRUN -> SKIP [fdo#109280] +8 * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt: - shard-iclb: PASS -> FAIL [fdo#105682] / [fdo#109247] +1 * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-pwrite: - shard-kbl: NOTRUN -> SKIP [fdo#109271] +18 * igt@kms_pipe_crc_basic@hang-read-crc-pipe-f: - shard-iclb: NOTRUN -> SKIP [fdo#109278] +2 * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d: - shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +6 * igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb: - shard-skl: NOTRUN -> FAIL [fdo#108145] +1 * igt@kms_plane_scaling@pipe-c-plane-scaling: - shard-hsw: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +3 * igt@kms_plane_scaling@pipe-c-scaler-with-rotation: - shard-iclb: NOTRUN -> FAIL [fdo#109052] * igt@kms_properties@connector-properties-legacy: - shard-iclb: PASS -> FAIL [fdo#109365] * igt@kms_psr@psr2_cursor_plane_onoff: - shard-iclb: PASS -> SKIP [fdo#109441] +3 * igt@kms_psr@psr2_primary_render: - shard-iclb: NOTRUN -> FAIL [fdo#107383] / [fdo#110215] * igt@kms_psr@sprite_blt: - shard-iclb: PASS -> FAIL [fdo#107383] / [fdo#110215] +5 * igt@kms_rotation_crc@multiplane-rotation: - shard-kbl: PASS -> INCOMPLETE [fdo#103665] * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom: - shard-kbl: PASS -> DMESG-FAIL [fdo#105763] * igt@kms_setmode@basic: - shard-skl: NOTRUN -> FAIL [fdo#99912] * igt@kms_universal_plane@disable-primary-vs-flip-pipe-f: - shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +10 * igt@prime_vgem@fence-wait-bsd1: - shard-iclb: NOTRUN -> SKIP [fdo#109276] +2 #### Possible fixes #### * igt@gem_exec_parallel@blt-fds: - shard-snb: INCOMPLETE [fdo#105411] -> PASS * igt@gem_partial_pwrite_pread@writes-after-reads-snoop: - shard-iclb: TIMEOUT [fdo#109673] -> PASS * igt@gem_softpin@noreloc-s3: - shard-skl: INCOMPLETE [fdo#104108] / [fdo#107773] -> PASS * igt@i915_pm_rpm@debugfs-read: - shard-skl: INCOMPLETE [fdo#107807] -> PASS * igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-untiled: - shard-skl: FAIL [fdo#103184] -> PASS * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw: - shard-iclb: FAIL [fdo#103167] -> PASS +6 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-iclb: FAIL [fdo#109247] -> PASS +23 * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: FAIL [fdo#107815] -> PASS * igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping: - shard-glk: SKIP [fdo#109271] / [fdo#109278] -> PASS * igt@kms_psr@primary_mmap_cpu: - shard-iclb: FAIL [fdo#107383] / [fdo#110215] -> PASS +2 * igt@kms_vblank@pipe-c-ts-continuation-suspend: - shard-iclb: FAIL [fdo#104894] -> PASS #### Warnings #### * igt@i915_pm_backlight@fade_with_suspend: - shard-skl: INCOMPLETE [fdo#107773] -> FAIL [fdo#107847] * igt@kms_dp_dsc@basic-dsc-enable-edp: - shard-iclb: SKIP [fdo#109349] -> FAIL [fdo#109358] * igt@kms_psr@psr2_primary_mmap_cpu: - shard-iclb: SKIP [fdo#109441] -> FAIL [fdo#107383] / [fdo#110215] +2 {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184 [fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 [fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894 [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411 [fdo#105682]: https://bugs.freedesktop.org/show_bug.cgi?id=105682 [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763 [fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383 [fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773 [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807 [fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815 [fdo#107847]: https://bugs.freedesktop.org/show_bug.cgi?id=107847 [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109052]: https://bugs.freedesktop.org/show_bug.cgi?id=109052 [fdo#109247]: https://bugs.freedesktop.org/show_bug.cgi?id=109247 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109277]: https://bugs.freedesktop.org/show_bug.cgi?id=109277 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109301]: https://bugs.freedesktop.org/show_bug.cgi?id=109301 [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312 [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349 [fdo#109358]: https://bugs.freedesktop.org/show_bug.cgi?id=109358 [fdo#109365]: https://bugs.freedesktop.org/show_bug.cgi?id=109365 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109559]: https://bugs.freedesktop.org/show_bug.cgi?id=109559 [fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673 [fdo#109674]: https://bugs.freedesktop.org/show_bug.cgi?id=109674 [fdo#110034]: https://bugs.freedesktop.org/show_bug.cgi?id=110034 [fdo#110215]: https://bugs.freedesktop.org/show_bug.cgi?id=110215 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Build changes ------------- * Linux: CI_DRM_5785 -> Patchwork_12541 CI_DRM_5785: 1e3d80c25878b7d97ad6c0680a452d55baeb28e0 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4894: fedd92f4022837e2c20e472b65bd7d0849f484a3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12541: 01f352dfa5ee51e068470b6f5aec76a801d1b0f8 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12541/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain 2019-03-21 7:37 [PATCH 1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain Chris Wilson ` (2 preceding siblings ...) 2019-03-21 17:07 ` ✓ Fi.CI.IGT: " Patchwork @ 2019-03-21 18:41 ` Caz Yokoyama 2019-03-21 18:38 ` Chris Wilson 3 siblings, 1 reply; 9+ messages in thread From: Caz Yokoyama @ 2019-03-21 18:41 UTC (permalink / raw) To: Chris Wilson, intel-gfx inline -caz On Thu, 2019-03-21 at 07:37 +0000, Chris Wilson wrote: > 32 is too many for the likes of kbl, and in order to insert that many Not only kbl. ring_size is 25 on my cfl. > requests into the ring requires us to declare the first few hung -- The hung is not caused by 32. It is caused by accumulation of requests for all prime numbers. > understandably a slow and unexpected process. Instead, measure the > size > of a singe requests and use that to estimate the upper bound on the > chain length we can use for our test, remembering to flush the > previous > chain between tests for safety. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > --- > drivers/gpu/drm/i915/selftests/intel_lrc.c | 40 > ++++++++++++++++++++-- > 1 file changed, 37 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/selftests/intel_lrc.c > b/drivers/gpu/drm/i915/selftests/intel_lrc.c > index d61520ea03c1..42068ed5eec0 100644 > --- a/drivers/gpu/drm/i915/selftests/intel_lrc.c > +++ b/drivers/gpu/drm/i915/selftests/intel_lrc.c > @@ -615,14 +615,33 @@ static int live_chain_preempt(void *arg) > struct i915_sched_attr attr = { > .priority = > I915_USER_PRIORITY(I915_PRIORITY_MAX), > }; > - int count, i; > + struct i915_request *rq; > + int ring_size, count, i; > > if (!intel_engine_has_preemption(engine)) > continue; > > - for_each_prime_number_from(count, 1, 32) { /* must fit > ring! */ > - struct i915_request *rq; > + rq = igt_spinner_create_request(&lo.spin, > + lo.ctx, engine, > + MI_ARB_CHECK); > + if (IS_ERR(rq)) > + goto err_wedged; > + i915_request_add(rq); > + > + ring_size = rq->wa_tail - rq->head; > + if (ring_size < 0) > + ring_size += rq->ring->size; > + ring_size = rq->ring->size / ring_size; > + pr_debug("%s(%s): Using maximum of %d requests\n", > + __func__, engine->name, ring_size); > > + igt_spinner_end(&lo.spin); > + if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 2) < > 0) { > + pr_err("Timed out waiting to flush %s\n", > engine->name); > + goto err_wedged; > + } > + > + for_each_prime_number_from(count, 1, ring_size) { > rq = igt_spinner_create_request(&hi.spin, > hi.ctx, engine, > MI_ARB_CHECK); > @@ -664,6 +683,21 @@ static int live_chain_preempt(void *arg) > goto err_wedged; > } > igt_spinner_end(&lo.spin); > + > + rq = i915_request_alloc(engine, lo.ctx); > + if (IS_ERR(rq)) > + goto err_wedged; > + i915_request_add(rq); This request add is redundant. Wait for the last rq for lo. > + if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ > / 5) < 0) { > + struct drm_printer p = > + drm_info_printer(i915- > >drm.dev); > + > + pr_err("Failed to flush low priority > chain of %d requests\n", > + count); > + intel_engine_dump(engine, &p, > + "%s\n", engine- > >name); > + goto err_wedged; > + } > } > } > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain 2019-03-21 18:41 ` [PATCH 1/2] " Caz Yokoyama @ 2019-03-21 18:38 ` Chris Wilson 2019-03-21 18:42 ` Chris Wilson 2019-03-21 18:58 ` Chris Wilson 0 siblings, 2 replies; 9+ messages in thread From: Chris Wilson @ 2019-03-21 18:38 UTC (permalink / raw) To: Caz Yokoyama, intel-gfx Quoting Caz Yokoyama (2019-03-21 18:41:10) > inline > -caz > On Thu, 2019-03-21 at 07:37 +0000, Chris Wilson wrote: > > 32 is too many for the likes of kbl, and in order to insert that many > Not only kbl. ring_size is 25 on my cfl. > > > requests into the ring requires us to declare the first few hung -- > The hung is not caused by 32. It is caused by accumulation of requests > for all prime numbers. Sure, but the design of the test is that we don't care for more than ring_size. > > > understandably a slow and unexpected process. Instead, measure the > > size > > of a singe requests and use that to estimate the upper bound on the > > chain length we can use for our test, remembering to flush the > > previous > > chain between tests for safety. > > > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > --- > > drivers/gpu/drm/i915/selftests/intel_lrc.c | 40 > > ++++++++++++++++++++-- > > 1 file changed, 37 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/selftests/intel_lrc.c > > b/drivers/gpu/drm/i915/selftests/intel_lrc.c > > index d61520ea03c1..42068ed5eec0 100644 > > --- a/drivers/gpu/drm/i915/selftests/intel_lrc.c > > +++ b/drivers/gpu/drm/i915/selftests/intel_lrc.c > > @@ -615,14 +615,33 @@ static int live_chain_preempt(void *arg) > > struct i915_sched_attr attr = { > > .priority = > > I915_USER_PRIORITY(I915_PRIORITY_MAX), > > }; > > - int count, i; > > + struct i915_request *rq; > > + int ring_size, count, i; > > > > if (!intel_engine_has_preemption(engine)) > > continue; > > > > - for_each_prime_number_from(count, 1, 32) { /* must fit > > ring! */ > > - struct i915_request *rq; > > + rq = igt_spinner_create_request(&lo.spin, > > + lo.ctx, engine, > > + MI_ARB_CHECK); > > + if (IS_ERR(rq)) > > + goto err_wedged; > > + i915_request_add(rq); > > + > > + ring_size = rq->wa_tail - rq->head; > > + if (ring_size < 0) > > + ring_size += rq->ring->size; > > + ring_size = rq->ring->size / ring_size; > > + pr_debug("%s(%s): Using maximum of %d requests\n", > > + __func__, engine->name, ring_size); > > > > + igt_spinner_end(&lo.spin); > > + if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 2) < > > 0) { > > + pr_err("Timed out waiting to flush %s\n", > > engine->name); > > + goto err_wedged; > > + } > > + > > + for_each_prime_number_from(count, 1, ring_size) { > > rq = igt_spinner_create_request(&hi.spin, > > hi.ctx, engine, > > MI_ARB_CHECK); > > @@ -664,6 +683,21 @@ static int live_chain_preempt(void *arg) > > goto err_wedged; > > } > > igt_spinner_end(&lo.spin); > > + > > + rq = i915_request_alloc(engine, lo.ctx); > > + if (IS_ERR(rq)) > > + goto err_wedged; > > + i915_request_add(rq); > This request add is redundant. Wait for the last rq for lo. Or not. And use a simple request as a flush and test. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain 2019-03-21 18:38 ` Chris Wilson @ 2019-03-21 18:42 ` Chris Wilson 2019-03-21 18:57 ` Caz Yokoyama 2019-03-21 18:58 ` Chris Wilson 1 sibling, 1 reply; 9+ messages in thread From: Chris Wilson @ 2019-03-21 18:42 UTC (permalink / raw) To: Caz Yokoyama, intel-gfx Quoting Chris Wilson (2019-03-21 18:38:53) > Quoting Caz Yokoyama (2019-03-21 18:41:10) > > inline > > -caz > > On Thu, 2019-03-21 at 07:37 +0000, Chris Wilson wrote: > > > 32 is too many for the likes of kbl, and in order to insert that many > > Not only kbl. ring_size is 25 on my cfl. > > > > > requests into the ring requires us to declare the first few hung -- > > The hung is not caused by 32. It is caused by accumulation of requests > > for all prime numbers. > > Sure, but the design of the test is that we don't care for more than > ring_size. And you can't have more than ring_size requests without hanging on the spinner. If we pick the maximum that allows for a prime number larger than ring_size, it hangs irrespective of whether or not you remember to flush the lo.ctx in between. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain 2019-03-21 18:42 ` Chris Wilson @ 2019-03-21 18:57 ` Caz Yokoyama 0 siblings, 0 replies; 9+ messages in thread From: Caz Yokoyama @ 2019-03-21 18:57 UTC (permalink / raw) To: Chris Wilson, intel-gfx Reviewed-by: Yokoyama, Caz <caz.yokoyama@intel.com> -caz On Thu, 2019-03-21 at 18:42 +0000, Chris Wilson wrote: > Quoting Chris Wilson (2019-03-21 18:38:53) > > Quoting Caz Yokoyama (2019-03-21 18:41:10) > > > inline > > > -caz > > > On Thu, 2019-03-21 at 07:37 +0000, Chris Wilson wrote: > > > > 32 is too many for the likes of kbl, and in order to insert > > > > that many > > > > > > Not only kbl. ring_size is 25 on my cfl. > > > > > > > requests into the ring requires us to declare the first few > > > > hung -- > > > > > > The hung is not caused by 32. It is caused by accumulation of > > > requests > > > for all prime numbers. > > > > Sure, but the design of the test is that we don't care for more > > than > > ring_size. > > And you can't have more than ring_size requests without hanging on > the > spinner. If we pick the maximum that allows for a prime number larger > than ring_size, it hangs irrespective of whether or not you remember > to > flush the lo.ctx in between. > -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain 2019-03-21 18:38 ` Chris Wilson 2019-03-21 18:42 ` Chris Wilson @ 2019-03-21 18:58 ` Chris Wilson 1 sibling, 0 replies; 9+ messages in thread From: Chris Wilson @ 2019-03-21 18:58 UTC (permalink / raw) To: Caz Yokoyama, intel-gfx Quoting Chris Wilson (2019-03-21 18:38:53) > Quoting Caz Yokoyama (2019-03-21 18:41:10) > > inline > > -caz > > On Thu, 2019-03-21 at 07:37 +0000, Chris Wilson wrote: > > > + > > > + rq = i915_request_alloc(engine, lo.ctx); > > > + if (IS_ERR(rq)) > > > + goto err_wedged; > > > + i915_request_add(rq); > > This request add is redundant. Wait for the last rq for lo. > > Or not. And use a simple request as a flush and test. The alternative would be to use igt_flush_test(). Some variance between tests is good for serendipity. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-03-21 18:58 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-03-21 7:37 [PATCH 1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain Chris Wilson 2019-03-21 7:37 ` [PATCH 2/2] drm/i915/selftests: Mark up preemption tests for hang detection Chris Wilson 2019-03-21 8:41 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Calculate maximum ring size for preemption chain Patchwork 2019-03-21 17:07 ` ✓ Fi.CI.IGT: " Patchwork 2019-03-21 18:41 ` [PATCH 1/2] " Caz Yokoyama 2019-03-21 18:38 ` Chris Wilson 2019-03-21 18:42 ` Chris Wilson 2019-03-21 18:57 ` Caz Yokoyama 2019-03-21 18:58 ` Chris Wilson
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