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* [PATCH] clk: imx6q: Do not reparent unregistered IMX6QDL_CLK_PERIPH2
@ 2019-03-20 17:12 ` Abel Vesa
  0 siblings, 0 replies; 4+ messages in thread
From: Abel Vesa @ 2019-03-20 17:12 UTC (permalink / raw)
  To: Mike Turquette, Stephen Boyd, Shawn Guo, Sascha Hauer, Fabio Estevam
  Cc: Aisheng Dong, dl-linux-imx, Anson Huang, Rob Herring, linux-clk,
	linux-arm-kernel, Linux Kernel Mailing List, Abel Vesa

The clock is registered later then these two re-parentings

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/clk/imx/clk-imx6q.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 708e7c5..c7b671e 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -291,12 +291,6 @@ static void mmdc_ch1_disable(void __iomem *ccm_base)
 	clk_set_parent(clk[IMX6QDL_CLK_PERIPH2_CLK2_SEL],
 		       clk[IMX6QDL_CLK_PLL3_USB_OTG]);
 
-	/*
-	 * Handshake with mmdc_ch1 module must be masked when changing
-	 * periph2_clk_sel.
-	 */
-	clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_CLK2]);
-
 	/* Disable pll3_sw_clk by selecting the bypass clock source */
 	reg = readl_relaxed(ccm_base + CCM_CCSR);
 	reg |= CCSR_PLL3_SW_CLK_SEL;
@@ -311,8 +305,6 @@ static void mmdc_ch1_reenable(void __iomem *ccm_base)
 	reg = readl_relaxed(ccm_base + CCM_CCSR);
 	reg &= ~CCSR_PLL3_SW_CLK_SEL;
 	writel_relaxed(reg, ccm_base + CCM_CCSR);
-
-	clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_PRE]);
 }
 
 /*
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH] clk: imx6q: Do not reparent unregistered IMX6QDL_CLK_PERIPH2
@ 2019-03-20 17:12 ` Abel Vesa
  0 siblings, 0 replies; 4+ messages in thread
From: Abel Vesa @ 2019-03-20 17:12 UTC (permalink / raw)
  To: Mike Turquette, Stephen Boyd, Shawn Guo, Sascha Hauer, Fabio Estevam
  Cc: Aisheng Dong, Rob Herring, Abel Vesa, Anson Huang,
	Linux Kernel Mailing List, dl-linux-imx, linux-clk,
	linux-arm-kernel

The clock is registered later then these two re-parentings

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/clk/imx/clk-imx6q.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 708e7c5..c7b671e 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -291,12 +291,6 @@ static void mmdc_ch1_disable(void __iomem *ccm_base)
 	clk_set_parent(clk[IMX6QDL_CLK_PERIPH2_CLK2_SEL],
 		       clk[IMX6QDL_CLK_PLL3_USB_OTG]);
 
-	/*
-	 * Handshake with mmdc_ch1 module must be masked when changing
-	 * periph2_clk_sel.
-	 */
-	clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_CLK2]);
-
 	/* Disable pll3_sw_clk by selecting the bypass clock source */
 	reg = readl_relaxed(ccm_base + CCM_CCSR);
 	reg |= CCSR_PLL3_SW_CLK_SEL;
@@ -311,8 +305,6 @@ static void mmdc_ch1_reenable(void __iomem *ccm_base)
 	reg = readl_relaxed(ccm_base + CCM_CCSR);
 	reg &= ~CCSR_PLL3_SW_CLK_SEL;
 	writel_relaxed(reg, ccm_base + CCM_CCSR);
-
-	clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_PRE]);
 }
 
 /*
-- 
2.7.4


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH] clk: imx6q: Do not reparent unregistered IMX6QDL_CLK_PERIPH2
  2019-03-20 17:12 ` Abel Vesa
@ 2019-03-21 16:35   ` Abel Vesa
  -1 siblings, 0 replies; 4+ messages in thread
From: Abel Vesa @ 2019-03-21 16:35 UTC (permalink / raw)
  To: Mike Turquette, Stephen Boyd, Shawn Guo, Sascha Hauer, Fabio Estevam
  Cc: Aisheng Dong, dl-linux-imx, Anson Huang, Rob Herring, linux-clk,
	linux-arm-kernel, Linux Kernel Mailing List

On 19-03-20 17:12:49, Abel Vesa wrote:
> The clock is registered later then these two re-parentings
> 

Ignore this patch. I'll send a patchset which has another fix for
another case like this one (plus the fix for the typo).

The patchset is actually switching all the imx6 and imx7 clocks
to clk_hw based API, but will include all the necessary fixes
for that to work.

> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  drivers/clk/imx/clk-imx6q.c | 8 --------
>  1 file changed, 8 deletions(-)
> 
> diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
> index 708e7c5..c7b671e 100644
> --- a/drivers/clk/imx/clk-imx6q.c
> +++ b/drivers/clk/imx/clk-imx6q.c
> @@ -291,12 +291,6 @@ static void mmdc_ch1_disable(void __iomem *ccm_base)
>  	clk_set_parent(clk[IMX6QDL_CLK_PERIPH2_CLK2_SEL],
>  		       clk[IMX6QDL_CLK_PLL3_USB_OTG]);
>  
> -	/*
> -	 * Handshake with mmdc_ch1 module must be masked when changing
> -	 * periph2_clk_sel.
> -	 */
> -	clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_CLK2]);
> -
>  	/* Disable pll3_sw_clk by selecting the bypass clock source */
>  	reg = readl_relaxed(ccm_base + CCM_CCSR);
>  	reg |= CCSR_PLL3_SW_CLK_SEL;
> @@ -311,8 +305,6 @@ static void mmdc_ch1_reenable(void __iomem *ccm_base)
>  	reg = readl_relaxed(ccm_base + CCM_CCSR);
>  	reg &= ~CCSR_PLL3_SW_CLK_SEL;
>  	writel_relaxed(reg, ccm_base + CCM_CCSR);
> -
> -	clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_PRE]);
>  }
>  
>  /*
> -- 
> 2.7.4
> 

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] clk: imx6q: Do not reparent unregistered IMX6QDL_CLK_PERIPH2
@ 2019-03-21 16:35   ` Abel Vesa
  0 siblings, 0 replies; 4+ messages in thread
From: Abel Vesa @ 2019-03-21 16:35 UTC (permalink / raw)
  To: Mike Turquette, Stephen Boyd, Shawn Guo, Sascha Hauer, Fabio Estevam
  Cc: Aisheng Dong, Rob Herring, Anson Huang,
	Linux Kernel Mailing List, dl-linux-imx, linux-clk,
	linux-arm-kernel

On 19-03-20 17:12:49, Abel Vesa wrote:
> The clock is registered later then these two re-parentings
> 

Ignore this patch. I'll send a patchset which has another fix for
another case like this one (plus the fix for the typo).

The patchset is actually switching all the imx6 and imx7 clocks
to clk_hw based API, but will include all the necessary fixes
for that to work.

> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  drivers/clk/imx/clk-imx6q.c | 8 --------
>  1 file changed, 8 deletions(-)
> 
> diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
> index 708e7c5..c7b671e 100644
> --- a/drivers/clk/imx/clk-imx6q.c
> +++ b/drivers/clk/imx/clk-imx6q.c
> @@ -291,12 +291,6 @@ static void mmdc_ch1_disable(void __iomem *ccm_base)
>  	clk_set_parent(clk[IMX6QDL_CLK_PERIPH2_CLK2_SEL],
>  		       clk[IMX6QDL_CLK_PLL3_USB_OTG]);
>  
> -	/*
> -	 * Handshake with mmdc_ch1 module must be masked when changing
> -	 * periph2_clk_sel.
> -	 */
> -	clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_CLK2]);
> -
>  	/* Disable pll3_sw_clk by selecting the bypass clock source */
>  	reg = readl_relaxed(ccm_base + CCM_CCSR);
>  	reg |= CCSR_PLL3_SW_CLK_SEL;
> @@ -311,8 +305,6 @@ static void mmdc_ch1_reenable(void __iomem *ccm_base)
>  	reg = readl_relaxed(ccm_base + CCM_CCSR);
>  	reg &= ~CCSR_PLL3_SW_CLK_SEL;
>  	writel_relaxed(reg, ccm_base + CCM_CCSR);
> -
> -	clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_PRE]);
>  }
>  
>  /*
> -- 
> 2.7.4
> 
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2019-03-21 16:35 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2019-03-20 17:12 [PATCH] clk: imx6q: Do not reparent unregistered IMX6QDL_CLK_PERIPH2 Abel Vesa
2019-03-20 17:12 ` Abel Vesa
2019-03-21 16:35 ` Abel Vesa
2019-03-21 16:35   ` Abel Vesa

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