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From: Annaliese McDermond <nh6z@nh6z.net>
To: broonie@kernel.org, alsa-devel@alsa-project.org
Cc: team@nwdigitalradio.com, Annaliese McDermond <nh6z@nh6z.net>
Subject: [PATCH v4 08/10] ASoC: tlv320aic32x4: Restructure set_dai_sysclk
Date: Thu, 21 Mar 2019 17:58:52 -0700	[thread overview]
Message-ID: <20190322005854.23360-9-nh6z@nh6z.net> (raw)
In-Reply-To: <20190322005854.23360-1-nh6z@nh6z.net>

The sysclk is now managed by the CCF.  Change this function
to merely find the system clock and set it using
clk_set_rate.

Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
---
 sound/soc/codecs/tlv320aic32x4.c | 17 ++++++-----------
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c
index 625528500f8d..289bf411e60e 100644
--- a/sound/soc/codecs/tlv320aic32x4.c
+++ b/sound/soc/codecs/tlv320aic32x4.c
@@ -49,7 +49,6 @@
 
 struct aic32x4_priv {
 	struct regmap *regmap;
-	u32 sysclk;
 	u32 power_cfg;
 	u32 micpga_routing;
 	bool swapdacs;
@@ -567,17 +566,13 @@ static int aic32x4_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 				  int clk_id, unsigned int freq, int dir)
 {
 	struct snd_soc_component *component = codec_dai->component;
-	struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component);
+	struct clk *mclk;
+	struct clk *pll;
 
-	switch (freq) {
-	case 12000000:
-	case 24000000:
-	case 25000000:
-		aic32x4->sysclk = freq;
-		return 0;
-	}
-	printk(KERN_ERR "aic32x4: invalid frequency to set DAI system clock\n");
-	return -EINVAL;
+	pll = devm_clk_get(component->dev, "pll");
+	mclk = clk_get_parent(pll);
+
+	return clk_set_rate(mclk, freq);
 }
 
 static int aic32x4_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
-- 
2.19.1

  parent reply	other threads:[~2019-03-22  0:59 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-22  0:58 [PATCH v4 00/10] ASoC: tlv320aic32x4: Rework Clock Setting Annaliese McDermond
2019-03-22  0:58 ` [PATCH v4 01/10] ASoC: tlv320aic32x4: Model PLL in CCF Annaliese McDermond
2019-03-25 16:11   ` Applied "ASoC: tlv320aic32x4: Model PLL in CCF" to the asoc tree Mark Brown
2019-03-22  0:58 ` [PATCH v4 02/10] ASoC: tlv320aic32x4: Model CODEC_CLKIN in CCF Annaliese McDermond
2019-03-22  0:58 ` [PATCH v4 03/10] ASoC: tlv320aic32x4: Model DAC/ADC dividers " Annaliese McDermond
2019-03-25 16:11   ` Applied "ASoC: tlv320aic32x4: Model DAC/ADC dividers in CCF" to the asoc tree Mark Brown
2019-03-22  0:58 ` [PATCH v4 04/10] ASoC: tlv320aic32x4: Model BDIV divider in CCF Annaliese McDermond
2019-03-22  0:58 ` [PATCH v4 05/10] ASoC: tlv320aic32x4: Control clock gating with CCF Annaliese McDermond
2019-03-22  0:58 ` [PATCH v4 06/10] ASoC: tlv320aic32x4: Move aosr and dosr setting to separate functions Annaliese McDermond
2019-03-22  0:58 ` [PATCH v4 07/10] ASoC: tlv320aic32x4: Dynamically Determine Clocking Annaliese McDermond
2019-03-25 16:11   ` Applied "ASoC: tlv320aic32x4: Dynamically Determine Clocking" to the asoc tree Mark Brown
2019-03-22  0:58 ` Annaliese McDermond [this message]
2019-03-22  0:58 ` [PATCH v4 09/10] ASoC: tlv320aic32x4: Remove mclk references Annaliese McDermond
2019-03-22  0:58 ` [PATCH v4 10/10] ASoC: tlv320aic32x4: Allow 192000 Sample Rate Annaliese McDermond

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