Re: [v2 2/2] drm/i915/icl: Fix port disable sequence for mipi-dsi

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Fri, Mar 22, 2019 at 03:37:35PM +0000, Kulkarni, Vandita wrote:
> 
> 
> > -----Original Message-----
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Sent: Friday, March 22, 2019 8:02 PM
> > To: Kulkarni, Vandita <vandita.kulkarni@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani <jani.nikula@intel.com>
> > Subject: Re: [Intel-gfx] [v2 2/2] drm/i915/icl: Fix port disable sequence for mipi-
> > dsi
> > 
> > On Fri, Mar 22, 2019 at 05:43:52PM +0530, Vandita Kulkarni wrote:
> > > Re-enable clock gating of DDI clocks.
> > >
> > > v2: Fix the default ddi clk state for mipi-dsi (Imre)
> > >
> > > Fixes: 1026bea00381 (drm/i915/icl: Ungate DSI clocks)
> > > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/icl_dsi.c   | 2 +-
> > >  drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
> > >  2 files changed, 4 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/icl_dsi.c
> > > b/drivers/gpu/drm/i915/icl_dsi.c index 6a5b9fa..5caf41f 100644
> > > --- a/drivers/gpu/drm/i915/icl_dsi.c
> > > +++ b/drivers/gpu/drm/i915/icl_dsi.c
> > > @@ -1124,7 +1124,7 @@ static void gen11_dsi_disable_port(struct
> > intel_encoder *encoder)
> > >  			DRM_ERROR("DDI port:%c buffer not idle\n",
> > >  				  port_name(port));
> > >  	}
> > > -	gen11_dsi_ungate_clocks(encoder);
> > > +	gen11_dsi_gate_clocks(encoder);
> > >  }
> > >
> > >  static void gen11_dsi_disable_io_power(struct intel_encoder *encoder)
> > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > index 933df3a..17a03fa 100644
> > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > @@ -2821,10 +2821,10 @@ void icl_sanitize_encoder_pll_mapping(struct
> > intel_encoder *encoder)
> > >  				return;
> > >  		}
> > >  		/*
> > > -		 * DSI ports should have their DDI clock ungated when disabled
> > > -		 * and gated when enabled.
> > > +		 * For MIPI DSI we unagate the clocks later as part of
> > > +		 * enable sequence. Keep them gated by default.
> > >  		 */
> > > -		ddi_clk_needed = !encoder->base.crtc;
> > > +		ddi_clk_needed = false;
> > 
> > Should that be true?
> No. False. 
> We are comparing ddi_clk_needed with clock ungated which is false for mipi dsi. 
> So we do nothing in this function if it is already gated, and gate it if we have ungated = true.

The comment is confusing me. Should it be something more like this?

/*
 * With DSI the clocks are always gated
 * except during the enable/disable sequence.
 */

> 
> Regards,
> Vandita
> 
> > 
> > >  	}
> > >
> > >  	val = I915_READ(DPCLKA_CFGCR0_ICL);
> > > --
> > > 1.9.1
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > 
> > --
> > Ville Syrjälä
> > Intel

-- 
Ville Syrjälä
Intel
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