Re: [BISECTED, REGRESSION] Broken networking on MIPS/OCTEON EdgeRouter Lite

From: Andrew Lunn <andrew@lunn.ch>
To: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Vinod Koul <vkoul@kernel.org>,
	"David S. Miller" <davem@davemloft.net>,
	netdev@vger.kernel.org, linux-mips@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [BISECTED, REGRESSION] Broken networking on MIPS/OCTEON EdgeRouter Lite
Date: Fri, 22 Mar 2019 22:25:57 +0100	[thread overview]
Message-ID: <20190322212557.GF16623@lunn.ch> (raw)
In-Reply-To: <20190322205059.GA29013@darkstar.musicnaut.iki.fi>

> The OCTEON HW code knows only about RGMII. And looking at
> octeon ethernet staging driver it does phy connect always with
> PHY_INTERFACE_MODE_GMII. I did some experimentation, and it seems that
> with PHY_INTERFACE_MODE_RGMII_RXID it starts to work.. In the DT we have
> for ethernet for this board:
> 
> 	rx-delay = <0>;
> 	tx-delay = <0x10>;

These are not PHY properties. 

Looking at the code, it looks like these control delays the MAC
inserts. I don't see a binding document for these properties, so i've
no idea what 0x10 means. Before this driver moves out of staging,
these values should be changed to be in ns.

However, PHY_INTERFACE_MODE_RGMII_RXID would make sense if 0x10 is
sufficient to add the TX delay.

What the driver should however do is call of_of_get_phy_mode() to get
the phy-mode from the DT blob and pass that to of_phy_connect().

    Andrew