From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4244C43381 for ; Mon, 25 Mar 2019 06:54:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8253A20854 for ; Mon, 25 Mar 2019 06:54:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=alien8.de header.i=@alien8.de header.b="STWh/0wQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729809AbfCYGyy (ORCPT ); Mon, 25 Mar 2019 02:54:54 -0400 Received: from mail.skyhub.de ([5.9.137.197]:54138 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729656AbfCYGyy (ORCPT ); Mon, 25 Mar 2019 02:54:54 -0400 Received: from zn.tnic (p200300EC2F098000329C23FFFEA6A903.dip0.t-ipconnect.de [IPv6:2003:ec:2f09:8000:329c:23ff:fea6:a903]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id DC9BE1EC02AE; Mon, 25 Mar 2019 07:54:51 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1553496892; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=LpYxhVlfV2gEX33wV6ozS41lCPpjrz6TfKLaI6w0DWs=; b=STWh/0wQCrqwcWm8++Mv75iFq985KBxk9fW2UIzE9jzeS4H/PeIAVTo5GUx3nsNnkuzS59 3DWXY9nWcoWC+Geg2GaXQLj2/O4PxEs4VY5m1hTHyUwlYawz302mAy/2WyOoncQ8Brp1zV EcdwslK0NW/UjdMzrOKk4QP8AyRGFlA= Date: Mon, 25 Mar 2019 07:54:54 +0100 From: Borislav Petkov To: Paul Walmsley Cc: Yash Shah , linux-riscv@lists.infradead.org, linux-edac@vger.kernel.org, palmer@sifive.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, aou@eecs.berkeley.edu, mchehab@kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 2/2] sifive: edac: Add EDAC driver for Sifive l2 Cache Controller Message-ID: <20190325065453.GC12016@zn.tnic> References: <1552382461-13051-1-git-send-email-yash.shah@sifive.com> <1552382461-13051-3-git-send-email-yash.shah@sifive.com> <20190312092842.GC28589@zn.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Mar 24, 2019 at 05:16:17PM -0700, Paul Walmsley wrote: > Looking at the Synopsys, Look again at synopsys_edac. > Highbank, Yes, that one and octeon. > PowerPC 4xx, and also a single ppc4xx_edac driver. > TI EDAC drivers, There's TI drivers, plural? I see only ti_edac.c. Also, per-vendor. > all of those are clearly for IP block error management, rather than > platform error management. Has the upstream guidance changed since > those drivers were merged? There are others which are per-platform and work just fine this way: xgene_edac, altera_edac, layerscape_edac, qcom_edac, synopsys_edac... The problem with per IP block is that if those compilation units would need to share info or communicate, then that is impossible nowadays and you'd need to build something on your own. Also, the EDAC core supports only one driver. > The core issue for us is that we don't have a generalized "ECC management" > IP block. And I would just as soon not fake one in the DT data, since the > general DT guidance is that the data in DT is meant to describe the actual > hardware. Look at how the others I mentioned above do it. > Would it make more sense to put this driver outside of drivers/edac? If you're not going to need any EDAC facilities - which are not a lot, btw :) - you can do whatever you prefer. -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply. From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [2/2] sifive: edac: Add EDAC driver for Sifive l2 Cache Controller From: Borislav Petkov Message-Id: <20190325065453.GC12016@zn.tnic> Date: Mon, 25 Mar 2019 07:54:54 +0100 To: Paul Walmsley Cc: Yash Shah , linux-riscv@lists.infradead.org, linux-edac@vger.kernel.org, palmer@sifive.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, aou@eecs.berkeley.edu, mchehab@kernel.org, devicetree@vger.kernel.org List-ID: T24gU3VuLCBNYXIgMjQsIDIwMTkgYXQgMDU6MTY6MTdQTSAtMDcwMCwgUGF1bCBXYWxtc2xleSB3 cm90ZToKPiBMb29raW5nIGF0IHRoZSBTeW5vcHN5cywKCkxvb2sgYWdhaW4gYXQgc3lub3BzeXNf ZWRhYy4KCj4gIEhpZ2hiYW5rLAoKWWVzLCB0aGF0IG9uZSBhbmQgb2N0ZW9uLgoKPiBQb3dlclBD IDR4eCwgYW5kCgphbHNvIGEgc2luZ2xlIHBwYzR4eF9lZGFjIGRyaXZlci4KCj4gVEkgRURBQyBk cml2ZXJzLAoKVGhlcmUncyBUSSBkcml2ZXJzLCBwbHVyYWw/IEkgc2VlIG9ubHkgdGlfZWRhYy5j LiBBbHNvLCBwZXItdmVuZG9yLgoKPiBhbGwgb2YgdGhvc2UgYXJlIGNsZWFybHkgZm9yIElQIGJs b2NrIGVycm9yIG1hbmFnZW1lbnQsIHJhdGhlciB0aGFuCj4gcGxhdGZvcm0gZXJyb3IgbWFuYWdl bWVudC4gSGFzIHRoZSB1cHN0cmVhbSBndWlkYW5jZSBjaGFuZ2VkIHNpbmNlCj4gdGhvc2UgZHJp dmVycyB3ZXJlIG1lcmdlZD8KClRoZXJlIGFyZSBvdGhlcnMgd2hpY2ggYXJlIHBlci1wbGF0Zm9y bSBhbmQgd29yayBqdXN0IGZpbmUgdGhpcyB3YXk6CnhnZW5lX2VkYWMsIGFsdGVyYV9lZGFjLCBs YXllcnNjYXBlX2VkYWMsIHFjb21fZWRhYywgc3lub3BzeXNfZWRhYy4uLgoKVGhlIHByb2JsZW0g d2l0aCBwZXIgSVAgYmxvY2sgaXMgdGhhdCBpZiB0aG9zZSBjb21waWxhdGlvbiB1bml0cyB3b3Vs ZApuZWVkIHRvIHNoYXJlIGluZm8gb3IgY29tbXVuaWNhdGUsIHRoZW4gdGhhdCBpcyBpbXBvc3Np YmxlIG5vd2FkYXlzIGFuZAp5b3UnZCBuZWVkIHRvIGJ1aWxkIHNvbWV0aGluZyBvbiB5b3VyIG93 bi4KCkFsc28sIHRoZSBFREFDIGNvcmUgc3VwcG9ydHMgb25seSBvbmUgZHJpdmVyLgoKPiBUaGUg Y29yZSBpc3N1ZSBmb3IgdXMgaXMgdGhhdCB3ZSBkb24ndCBoYXZlIGEgZ2VuZXJhbGl6ZWQgIkVD QyBtYW5hZ2VtZW50IiAKPiBJUCBibG9jay4gIEFuZCBJIHdvdWxkIGp1c3QgYXMgc29vbiBub3Qg ZmFrZSBvbmUgaW4gdGhlIERUIGRhdGEsIHNpbmNlIHRoZSAKPiBnZW5lcmFsIERUIGd1aWRhbmNl IGlzIHRoYXQgdGhlIGRhdGEgaW4gRFQgaXMgbWVhbnQgdG8gZGVzY3JpYmUgdGhlIGFjdHVhbCAK PiBoYXJkd2FyZS4KCkxvb2sgYXQgaG93IHRoZSBvdGhlcnMgSSBtZW50aW9uZWQgYWJvdmUgZG8g aXQuCgo+IFdvdWxkIGl0IG1ha2UgbW9yZSBzZW5zZSB0byBwdXQgdGhpcyBkcml2ZXIgb3V0c2lk ZSBvZiBkcml2ZXJzL2VkYWM/CgpJZiB5b3UncmUgbm90IGdvaW5nIHRvIG5lZWQgYW55IEVEQUMg ZmFjaWxpdGllcyAtIHdoaWNoIGFyZSBub3QgYSBsb3QsCmJ0dyA6KSAtIHlvdSBjYW4gZG8gd2hh dGV2ZXIgeW91IHByZWZlci4K From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED, USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE4DDC43381 for ; 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Mon, 25 Mar 2019 06:54:57 +0000 Received: from zn.tnic (p200300EC2F098000329C23FFFEA6A903.dip0.t-ipconnect.de [IPv6:2003:ec:2f09:8000:329c:23ff:fea6:a903]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id DC9BE1EC02AE; Mon, 25 Mar 2019 07:54:51 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1553496892; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=LpYxhVlfV2gEX33wV6ozS41lCPpjrz6TfKLaI6w0DWs=; b=STWh/0wQCrqwcWm8++Mv75iFq985KBxk9fW2UIzE9jzeS4H/PeIAVTo5GUx3nsNnkuzS59 3DWXY9nWcoWC+Geg2GaXQLj2/O4PxEs4VY5m1hTHyUwlYawz302mAy/2WyOoncQ8Brp1zV EcdwslK0NW/UjdMzrOKk4QP8AyRGFlA= Date: Mon, 25 Mar 2019 07:54:54 +0100 From: Borislav Petkov To: Paul Walmsley Subject: Re: [PATCH 2/2] sifive: edac: Add EDAC driver for Sifive l2 Cache Controller Message-ID: <20190325065453.GC12016@zn.tnic> References: <1552382461-13051-1-git-send-email-yash.shah@sifive.com> <1552382461-13051-3-git-send-email-yash.shah@sifive.com> <20190312092842.GC28589@zn.tnic> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190324_235455_568777_4008B8B3 X-CRM114-Status: GOOD ( 12.84 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, aou@eecs.berkeley.edu, palmer@sifive.com, linux-kernel@vger.kernel.org, Yash Shah , robh+dt@kernel.org, linux-riscv@lists.infradead.org, mchehab@kernel.org, linux-edac@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Sun, Mar 24, 2019 at 05:16:17PM -0700, Paul Walmsley wrote: > Looking at the Synopsys, Look again at synopsys_edac. > Highbank, Yes, that one and octeon. > PowerPC 4xx, and also a single ppc4xx_edac driver. > TI EDAC drivers, There's TI drivers, plural? I see only ti_edac.c. Also, per-vendor. > all of those are clearly for IP block error management, rather than > platform error management. Has the upstream guidance changed since > those drivers were merged? There are others which are per-platform and work just fine this way: xgene_edac, altera_edac, layerscape_edac, qcom_edac, synopsys_edac... The problem with per IP block is that if those compilation units would need to share info or communicate, then that is impossible nowadays and you'd need to build something on your own. Also, the EDAC core supports only one driver. > The core issue for us is that we don't have a generalized "ECC management" > IP block. And I would just as soon not fake one in the DT data, since the > general DT guidance is that the data in DT is meant to describe the actual > hardware. Look at how the others I mentioned above do it. > Would it make more sense to put this driver outside of drivers/edac? If you're not going to need any EDAC facilities - which are not a lot, btw :) - you can do whatever you prefer. -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv