From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CFA1C43381 for ; Wed, 27 Mar 2019 19:19:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D279821734 for ; Wed, 27 Mar 2019 19:19:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1553714397; bh=bX4pBVz/3iw4BZm1qrpNl4QIZCV1Uj/5LGwYhZDu13s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=P8M2G7DoXozFygX7h6vz1BinNdpGMSp359x9p8RS4MqYv3cjMEkn9SztlA03N4VfL OrG23+NZ3qiBez8/APkheJrRQDDb5LTtLQNFKYdpaLW1CVu6JKFYU2dM5rrxAc/qYV QcV4LQ+JbKWZh3Z9oSoVmPwDR88FS7U8Js0bjjbY= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388647AbfC0TT4 (ORCPT ); Wed, 27 Mar 2019 15:19:56 -0400 Received: from mail.kernel.org ([198.145.29.99]:49418 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388208AbfC0SHd (ORCPT ); Wed, 27 Mar 2019 14:07:33 -0400 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E1710217D9; Wed, 27 Mar 2019 18:07:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1553710052; bh=bX4pBVz/3iw4BZm1qrpNl4QIZCV1Uj/5LGwYhZDu13s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=I6LOScpivMLjUz2gchQAjZQ2UbWPIEHoJROOjnXpVxnylVBFBooB15JLkARkcwyrD tfSG8FAkyknhjqq6+VS1f0/CxAs5TejqSWpZQIBm2KbBMdoD3w6sCFkR28HMFYx8o2 Nqn4tPTzznYiXRt7FA5WMA6gGAcKHH18KVOGBsWg= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Nicholas Kazlauskas , Alex Deucher , Sasha Levin , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 5.0 175/262] drm/amd/display: Disconnect mpcc when changing tg Date: Wed, 27 Mar 2019 14:00:30 -0400 Message-Id: <20190327180158.10245-175-sashal@kernel.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190327180158.10245-1-sashal@kernel.org> References: <20190327180158.10245-1-sashal@kernel.org> MIME-Version: 1.0 X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Nicholas Kazlauskas [ Upstream commit 77476360f173c127c191bfe8ca8113130ef283b8 ] [Why] This fixes an mpc programming error for the following sequence of atomic commits when pipe split is enabled: Commit 1: CRTC0 (plane 4, plane 3) Pipe 0: old_plane_state = A0, new_plane_state = A1, new_tg = T0 Pipe 1: old_plane_state = B0, new_plane_state = B1, new_tg = T0 Pipe 2: old_plane_state = A0, new_plane_state = A1, new_tg = T0 Pipe 3: old_plane_state = B0, new_plane_state = B1, new_tg = T0 Commit 2: CRTC0 (plane 3), CRTC1 (plane 2) Pipe 0: old_plane_state = A1, new_plane_state = A2, new_tg = T0 Pipe 1: old_plane_state = B1, new_plane_state = B2, new_tg = T1 Pipe 2: old_plane_state = A1, new_plane_state = NULL, new_tg = NULL Pipe 3: old_plane_state = B1, new_plane_state = NULL, new_tg = NULL In the second commit the assertion for mpcc in use is hit because mpcc disconnect never occurs for pipe 1. This is because the stream changes for pipe 1 and the opp_list is empty. This sequence occurs when running the "igt@kms_plane_multiple@atomic-pipe-A-tiling-none" test with two displays connected. [How] Expand the reset condition to include: "old_pipe_ctx->stream_res.tg != new_pipe_ctx->stream_res.tg" ...but only when the plane state is non-NULL for both old and new. Signed-off-by: Nicholas Kazlauskas Reviewed-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 41883c981789..a684b38332ac 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -2334,9 +2334,10 @@ static void dcn10_apply_ctx_for_surface( } } - if (!pipe_ctx->plane_state && - old_pipe_ctx->plane_state && - old_pipe_ctx->stream_res.tg == tg) { + if ((!pipe_ctx->plane_state || + pipe_ctx->stream_res.tg != old_pipe_ctx->stream_res.tg) && + old_pipe_ctx->plane_state && + old_pipe_ctx->stream_res.tg == tg) { dc->hwss.plane_atomic_disconnect(dc, old_pipe_ctx); removed_pipe[i] = true; -- 2.19.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sasha Levin Subject: [PATCH AUTOSEL 5.0 175/262] drm/amd/display: Disconnect mpcc when changing tg Date: Wed, 27 Mar 2019 14:00:30 -0400 Message-ID: <20190327180158.10245-175-sashal@kernel.org> References: <20190327180158.10245-1-sashal@kernel.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20190327180158.10245-1-sashal-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: Alex Deucher , Sasha Levin , dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Nicholas Kazlauskas , amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org List-Id: dri-devel@lists.freedesktop.org RnJvbTogTmljaG9sYXMgS2F6bGF1c2thcyA8bmljaG9sYXMua2F6bGF1c2thc0BhbWQuY29tPgoK WyBVcHN0cmVhbSBjb21taXQgNzc0NzYzNjBmMTczYzEyN2MxOTFiZmU4Y2E4MTEzMTMwZWYyODNi OCBdCgpbV2h5XQpUaGlzIGZpeGVzIGFuIG1wYyBwcm9ncmFtbWluZyBlcnJvciBmb3IgdGhlIGZv bGxvd2luZyBzZXF1ZW5jZSBvZgphdG9taWMgY29tbWl0cyB3aGVuIHBpcGUgc3BsaXQgaXMgZW5h YmxlZDoKCkNvbW1pdCAxOiBDUlRDMCAocGxhbmUgNCwgcGxhbmUgMykKClBpcGUgMDogb2xkX3Bs YW5lX3N0YXRlID0gQTAsIG5ld19wbGFuZV9zdGF0ZSA9IEExLCAgIG5ld190ZyA9IFQwClBpcGUg MTogb2xkX3BsYW5lX3N0YXRlID0gQjAsIG5ld19wbGFuZV9zdGF0ZSA9IEIxLCAgIG5ld190ZyA9 IFQwClBpcGUgMjogb2xkX3BsYW5lX3N0YXRlID0gQTAsIG5ld19wbGFuZV9zdGF0ZSA9IEExLCAg IG5ld190ZyA9IFQwClBpcGUgMzogb2xkX3BsYW5lX3N0YXRlID0gQjAsIG5ld19wbGFuZV9zdGF0 ZSA9IEIxLCAgIG5ld190ZyA9IFQwCgpDb21taXQgMjogQ1JUQzAgKHBsYW5lIDMpLCBDUlRDMSAo cGxhbmUgMikKClBpcGUgMDogb2xkX3BsYW5lX3N0YXRlID0gQTEsIG5ld19wbGFuZV9zdGF0ZSA9 IEEyLCAgIG5ld190ZyA9IFQwClBpcGUgMTogb2xkX3BsYW5lX3N0YXRlID0gQjEsIG5ld19wbGFu ZV9zdGF0ZSA9IEIyLCAgIG5ld190ZyA9IFQxClBpcGUgMjogb2xkX3BsYW5lX3N0YXRlID0gQTEs IG5ld19wbGFuZV9zdGF0ZSA9IE5VTEwsIG5ld190ZyA9IE5VTEwKUGlwZSAzOiBvbGRfcGxhbmVf c3RhdGUgPSBCMSwgbmV3X3BsYW5lX3N0YXRlID0gTlVMTCwgbmV3X3RnID0gTlVMTAoKSW4gdGhl IHNlY29uZCBjb21taXQgdGhlIGFzc2VydGlvbiBmb3IgbXBjYyBpbiB1c2UgaXMgaGl0IGJlY2F1 c2UKbXBjYyBkaXNjb25uZWN0IG5ldmVyIG9jY3VycyBmb3IgcGlwZSAxLiBUaGlzIGlzIGJlY2F1 c2UgdGhlIHN0cmVhbQpjaGFuZ2VzIGZvciBwaXBlIDEgYW5kIHRoZSBvcHBfbGlzdCBpcyBlbXB0 eS4KClRoaXMgc2VxdWVuY2Ugb2NjdXJzIHdoZW4gcnVubmluZyB0aGUKImlndEBrbXNfcGxhbmVf bXVsdGlwbGVAYXRvbWljLXBpcGUtQS10aWxpbmctbm9uZSIgdGVzdCB3aXRoIHR3bwpkaXNwbGF5 cyBjb25uZWN0ZWQuCgpbSG93XQpFeHBhbmQgdGhlIHJlc2V0IGNvbmRpdGlvbiB0byBpbmNsdWRl OgoKIm9sZF9waXBlX2N0eC0+c3RyZWFtX3Jlcy50ZyAhPSBuZXdfcGlwZV9jdHgtPnN0cmVhbV9y ZXMudGciCgouLi5idXQgb25seSB3aGVuIHRoZSBwbGFuZSBzdGF0ZSBpcyBub24tTlVMTCBmb3Ig Ym90aCBvbGQgYW5kIG5ldy4KClNpZ25lZC1vZmYtYnk6IE5pY2hvbGFzIEthemxhdXNrYXMgPG5p Y2hvbGFzLmthemxhdXNrYXNAYW1kLmNvbT4KUmV2aWV3ZWQtYnk6IERteXRybyBMYWt0eXVzaGtp biA8RG15dHJvLkxha3R5dXNoa2luQGFtZC5jb20+ClJldmlld2VkLWJ5OiBUb255IENoZW5nIDxU b255LkNoZW5nQGFtZC5jb20+CkFja2VkLWJ5OiBCaGF3YW5wcmVldCBMYWtoYSA8Qmhhd2FucHJl ZXQuTGFraGFAYW1kLmNvbT4KU2lnbmVkLW9mZi1ieTogQWxleCBEZXVjaGVyIDxhbGV4YW5kZXIu ZGV1Y2hlckBhbWQuY29tPgpTaWduZWQtb2ZmLWJ5OiBTYXNoYSBMZXZpbiA8c2FzaGFsQGtlcm5l bC5vcmc+Ci0tLQogZHJpdmVycy9ncHUvZHJtL2FtZC9kaXNwbGF5L2RjL2RjbjEwL2RjbjEwX2h3 X3NlcXVlbmNlci5jIHwgNyArKysrLS0tCiAxIGZpbGUgY2hhbmdlZCwgNCBpbnNlcnRpb25zKCsp LCAzIGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9hbWQvZGlzcGxh eS9kYy9kY24xMC9kY24xMF9od19zZXF1ZW5jZXIuYyBiL2RyaXZlcnMvZ3B1L2RybS9hbWQvZGlz cGxheS9kYy9kY24xMC9kY24xMF9od19zZXF1ZW5jZXIuYwppbmRleCA0MTg4M2M5ODE3ODkuLmE2 ODRiMzgzMzJhYyAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL2FtZC9kaXNwbGF5L2RjL2Rj bjEwL2RjbjEwX2h3X3NlcXVlbmNlci5jCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9hbWQvZGlzcGxh eS9kYy9kY24xMC9kY24xMF9od19zZXF1ZW5jZXIuYwpAQCAtMjMzNCw5ICsyMzM0LDEwIEBAIHN0 YXRpYyB2b2lkIGRjbjEwX2FwcGx5X2N0eF9mb3Jfc3VyZmFjZSgKIAkJCX0KIAkJfQogCi0JCWlm ICghcGlwZV9jdHgtPnBsYW5lX3N0YXRlICYmCi0JCQlvbGRfcGlwZV9jdHgtPnBsYW5lX3N0YXRl ICYmCi0JCQlvbGRfcGlwZV9jdHgtPnN0cmVhbV9yZXMudGcgPT0gdGcpIHsKKwkJaWYgKCghcGlw ZV9jdHgtPnBsYW5lX3N0YXRlIHx8CisJCSAgICAgcGlwZV9jdHgtPnN0cmVhbV9yZXMudGcgIT0g b2xkX3BpcGVfY3R4LT5zdHJlYW1fcmVzLnRnKSAmJgorCQkgICAgb2xkX3BpcGVfY3R4LT5wbGFu ZV9zdGF0ZSAmJgorCQkgICAgb2xkX3BpcGVfY3R4LT5zdHJlYW1fcmVzLnRnID09IHRnKSB7CiAK IAkJCWRjLT5od3NzLnBsYW5lX2F0b21pY19kaXNjb25uZWN0KGRjLCBvbGRfcGlwZV9jdHgpOwog CQkJcmVtb3ZlZF9waXBlW2ldID0gdHJ1ZTsKLS0gCjIuMTkuMQoKX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX18KYW1kLWdmeCBtYWlsaW5nIGxpc3QKYW1kLWdm eEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFp bG1hbi9saXN0aW5mby9hbWQtZ2Z4