From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C4B8C43381 for ; Thu, 28 Mar 2019 16:28:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E97DE2054F for ; Thu, 28 Mar 2019 16:28:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726949AbfC1Q2W (ORCPT ); Thu, 28 Mar 2019 12:28:22 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:47946 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726046AbfC1Q2W (ORCPT ); Thu, 28 Mar 2019 12:28:22 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A80FD80D; Thu, 28 Mar 2019 09:28:21 -0700 (PDT) Received: from red-moon (red-moon.cambridge.arm.com [10.1.197.39]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 04D833F557; Thu, 28 Mar 2019 09:28:19 -0700 (PDT) Date: Thu, 28 Mar 2019 16:28:57 +0000 From: Lorenzo Pieralisi To: Geert Uytterhoeven Cc: Marek Vasut , Simon Horman , linux-pci , Marek Vasut , Geert Uytterhoeven , Phil Edworthy , Wolfram Sang , Linux-Renesas Subject: Re: [PATCH V4 6/6] PCI: rcar: Fix 64bit MSI message address handling Message-ID: <20190328162857.GB19825@red-moon> References: <20190325114101.10198-1-marek.vasut@gmail.com> <20190325114101.10198-6-marek.vasut@gmail.com> <20190327113023.zhnx5v5spcx7uoqj@verge.net.au> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org On Thu, Mar 28, 2019 at 09:02:00AM +0100, Geert Uytterhoeven wrote: > Hi Marek, > > On Thu, Mar 28, 2019 at 4:19 AM Marek Vasut wrote: > > On 3/27/19 1:22 PM, Geert Uytterhoeven wrote: > > > On Wed, Mar 27, 2019 at 12:30 PM Simon Horman wrote: > > >> On Mon, Mar 25, 2019 at 12:41:01PM +0100, marek.vasut@gmail.com wrote: > > >>> From: Marek Vasut > > >>> The MSI message address in the RC address space can be 64 bit. The > > >>> R-Car PCIe RC supports such a 64bit MSI message address as well. > > >>> The code currently uses virt_to_phys(__get_free_pages()) to obtain > > >>> a reserved page for the MSI message address, and the return value > > >>> of which can be a 64 bit physical address on 64 bit system. > > >>> > > >>> However, the driver only programs PCIEMSIALR register with the bottom > > >>> 32 bits of the virt_to_phys(__get_free_pages()) return value and does > > >>> not program the top 32 bits into PCIEMSIAUR, but rather programs the > > >>> PCIEMSIAUR register with 0x0. This worked fine on older 32 bit R-Car > > >>> SoCs, however may fail on new 64 bit R-Car SoCs. > > >>> > > >>> Since from a PCIe controller perspective, an inbound MSI is a memory > > >>> write to a special address (in case of this controller, defined by > > >>> the value in PCIEMSIAUR:PCIEMSIALR), which triggers an interrupt, but > > >>> never hits the DRAM _and_ because allocation of an MSI by a PCIe card > > >>> driver obtains the MSI message address by reading PCIEMSIAUR:PCIEMSIALR > > >>> in rcar_msi_setup_irqs(), incorrectly programmed PCIEMSIAUR cannot > > >>> cause memory corruption or other issues. > > >>> > > >>> There is however the possibility that if virt_to_phys(__get_free_pages()) > > >>> returned address above the 32bit boundary _and_ PCIEMSIAUR was programmed > > >>> to 0x0 _and_ if the system had physical RAM at the address matching the > > >>> value of PCIEMSIALR, a PCIe card driver could allocate a buffer with a > > >>> physical address matching the value of PCIEMSIALR and a remote write to > > >>> such a buffer by a PCIe card would trigger a spurious MSI. > > >>> > > >>> Signed-off-by: Marek Vasut > > >>> Cc: Geert Uytterhoeven > > >>> Cc: Phil Edworthy > > >>> Cc: Simon Horman > > >>> Cc: Wolfram Sang > > >>> Cc: linux-renesas-soc@vger.kernel.org > > >>> To: linux-pci@vger.kernel.org > > >>> Reviewed-by: Geert Uytterhoeven > > >> > > >> Does this warrant a Fixes tag? > > > > > > (digging in old sent email) > > > Fixes: 290c1fb358605402 ("PCI: rcar: Add MSI support for PCIe") > > > > But does it really fix that commit, given that on Gen2 and earlier, it > > was not broken as those were 32bit platforms ? > > It does not fix the bug on that commit, as the bug cannot happen on arm32. > It does fix that commit, in that that commit used "unsigned long" for a > physical address, which is wrong, even on arm32 (esp. with LPAE). > If you insist on having a Fixes tag for a commit where the bug could be > seen: > Fixes: e015f88c368da1e6 ("PCI: rcar: Add support for R-Car H3 to pcie-rcar") > > Apart from that, drivers should use the DMA API instead of virt_to_phys(). > However, now we have a better understanding of how MSI interrupts > work, we don't even need to allocate that page. All we need is the > physical address of a page that is guaranteed not to be backed by RAM > (i.e. not to be a valid target for a legitimate PCI bus mastering > transaction). Agreed but I would merge this patch first since it is a fix and update it later. Shall I go with the Fixes: tag above ? Thanks, Lorenzo > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds