From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED289C43381 for ; Mon, 1 Apr 2019 17:58:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BB0332084B for ; Mon, 1 Apr 2019 17:58:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="n4war+3T" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731332AbfDARSK (ORCPT ); Mon, 1 Apr 2019 13:18:10 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:40016 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731282AbfDARR6 (ORCPT ); Mon, 1 Apr 2019 13:17:58 -0400 Received: by mail-pl1-f193.google.com with SMTP id b3so1825599plr.7 for ; Mon, 01 Apr 2019 10:17:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=E8IUBh2t3q/gZip595rgxxfTnEAlJdLlEiDkGG8UPQc=; b=n4war+3TYvTWQtIFzamwi0I1IGjDuVEQajeX6wZ0m79OJvpTpOBcQxQzyz1fUVtPkA 0Ogp7I4JAPaZPQpC0FnDR2UM1bhkLujej0eK9rLSiFSFnIucAjd7VmI8RovCbA619CiS 51elLbTBukwi6mBA22dQ/6+eCjawtao2LjodM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=E8IUBh2t3q/gZip595rgxxfTnEAlJdLlEiDkGG8UPQc=; b=DUveP+q+uFIYja/hK+kFueZFTw0EXwgGgI/m9eySuW4S28hsO7cwIIlBVm8uAlpiyx hZkBgvZO66Vi4VA9ZsgUWmyTHYGoSU61CeKiioj90YCwdiySDqXrRe3fDdPETZXk58RA 8auW19prkp+3fILFOLNL79LlMvQ8ddyVzvOM9o8mzQyjBzVv4K5ezeaFO4yowAj40FnD Gd6pTotP6XY45B7VuTeMvG9/+uoEyo8npGslEeQj1IEm2wOkPHrjitZB708liObJ9/l6 DTjZTd66XZ4U+143BY9D/Qjx+iVl7CogY7lOb/D1BNz7MtPeLg45MvxXXg5Iotp/Tpe0 le/A== X-Gm-Message-State: APjAAAWQ5zVYoxy+/GR3j4+y2uKrhrgwjwiRs7enqYNKXpRnAJ7xVicr pTOUb9M2cqZYsMxgBqoxOuWELw== X-Google-Smtp-Source: APXvYqxng9dGnz4+/iq6MwJNWBWqwWstpaeHh6nSrd3tkiYwPL0XTYP3/67fPRrxvgHBRQJyWDu5Yw== X-Received: by 2002:a17:902:248:: with SMTP id 66mr66531817plc.286.1554139077705; Mon, 01 Apr 2019 10:17:57 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:24fa:e766:52c9:e3b2]) by smtp.gmail.com with ESMTPSA id y12sm31370112pgq.64.2019.04.01.10.17.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 01 Apr 2019 10:17:56 -0700 (PDT) From: Douglas Anderson To: Thierry Reding , Heiko Stuebner , Sean Paul Cc: linux-rockchip@lists.infradead.org, Laurent Pinchart , dri-devel@lists.freedesktop.org, Boris Brezillon , Ezequiel Garcia , =?UTF-8?q?Enric=20Balletb=C3=B2?= , Rob Herring , mka@chromium.org, Douglas Anderson , David Airlie , linux-kernel@vger.kernel.org, Daniel Vetter Subject: [PATCH v5 4/7] drm/panel: simple: Use display_timing for Innolux n116bge Date: Mon, 1 Apr 2019 10:17:21 -0700 Message-Id: <20190401171724.215780-5-dianders@chromium.org> X-Mailer: git-send-email 2.21.0.392.gf8f6787159e-goog In-Reply-To: <20190401171724.215780-1-dianders@chromium.org> References: <20190401171724.215780-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the Innolux n116bge from using a fixed mode to specifying a display timing with min/typ/max values. Note that the n116bge's datasheet doesn't fit too well into DRM's way of specifying things. Specifically the panel's datasheet just specifies the vertical blanking period and horizontal blanking period and doesn't break things out. For now we'll leave everything as a fixed value but just allow adjusting the pixel clock. I've added a comment on what the datasheet claims so someone could later expand things to fit their needs if they wanted to test other blanking periods. The goal here is to be able to specify the panel timings in the device tree for several rk3288 Chromebooks (like rk3288-veryon-jerry). These Chromebooks have all been running in the downstream kernel with the standard porches and sync lengths but just with a slightly slower pixel clock because the 76.42 MHz clock is not achievable from the fixed PLL that was available. These Chromebooks only achieve a refresh rate of ~58 Hz. While it's probable that we could adjust the timings to achieve 60 Hz it's probably wisest to match what's been running on these devices all these years. I'll note that though the upstream kernel has always tried to achieve 76.42 MHz, it has actually been running at 74.25 MHz also since the video processor is parented off the same fixed PLL. Changes in v4: - display_timing for Innolux n116bge new for v4. Changes in v5: - Added Heiko's Tested-by Signed-off-by: Douglas Anderson Tested-by: Heiko Stuebner --- drivers/gpu/drm/panel/panel-simple.c | 37 +++++++++++++++++----------- 1 file changed, 23 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index ad4f4aac2d44..7d407fab3628 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1550,23 +1550,32 @@ static const struct panel_desc innolux_g121x1_l03 = { }, }; -static const struct drm_display_mode innolux_n116bge_mode = { - .clock = 76420, - .hdisplay = 1366, - .hsync_start = 1366 + 136, - .hsync_end = 1366 + 136 + 30, - .htotal = 1366 + 136 + 30 + 60, - .vdisplay = 768, - .vsync_start = 768 + 8, - .vsync_end = 768 + 8 + 12, - .vtotal = 768 + 8 + 12 + 12, - .vrefresh = 60, - .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, +/* + * Datasheet specifies that at 60 Hz refresh rate: + * - total horizontal time: { 1506, 1592, 1716 } + * - total vertical time: { 788, 800, 868 } + * + * ...but doesn't go into exactly how that should be split into a front + * porch, back porch, or sync length. For now we'll leave a single setting + * here which allows a bit of tweaking of the pixel clock at the expense of + * refresh rate. + */ +static const struct display_timing innolux_n116bge_timing = { + .pixelclock = { 72600000, 76420000, 80240000 }, + .hactive = { 1366, 1366, 1366 }, + .hfront_porch = { 136, 136, 136 }, + .hback_porch = { 60, 60, 60 }, + .hsync_len = { 30, 30, 30 }, + .vactive = { 768, 768, 768 }, + .vfront_porch = { 8, 8, 8 }, + .vback_porch = { 12, 12, 12 }, + .vsync_len = { 12, 12, 12 }, + .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, }; static const struct panel_desc innolux_n116bge = { - .modes = &innolux_n116bge_mode, - .num_modes = 1, + .timings = &innolux_n116bge_timing, + .num_timings = 1, .bpc = 6, .size = { .width = 256, -- 2.21.0.392.gf8f6787159e-goog From mboxrd@z Thu Jan 1 00:00:00 1970 From: Douglas Anderson Subject: [PATCH v5 4/7] drm/panel: simple: Use display_timing for Innolux n116bge Date: Mon, 1 Apr 2019 10:17:21 -0700 Message-ID: <20190401171724.215780-5-dianders@chromium.org> References: <20190401171724.215780-1-dianders@chromium.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20190401171724.215780-1-dianders@chromium.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Thierry Reding , Heiko Stuebner , Sean Paul Cc: Rob Herring , David Airlie , Douglas Anderson , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Boris Brezillon , Laurent Pinchart , =?UTF-8?q?Enric=20Balletb=C3=B2?= , Ezequiel Garcia , mka@chromium.org List-Id: linux-rockchip.vger.kernel.org Q29udmVydCB0aGUgSW5ub2x1eCBuMTE2YmdlIGZyb20gdXNpbmcgYSBmaXhlZCBtb2RlIHRvIHNw ZWNpZnlpbmcgYQpkaXNwbGF5IHRpbWluZyB3aXRoIG1pbi90eXAvbWF4IHZhbHVlcy4KCk5vdGUg dGhhdCB0aGUgbjExNmJnZSdzIGRhdGFzaGVldCBkb2Vzbid0IGZpdCB0b28gd2VsbCBpbnRvIERS TSdzIHdheQpvZiBzcGVjaWZ5aW5nIHRoaW5ncy4gIFNwZWNpZmljYWxseSB0aGUgcGFuZWwncyBk YXRhc2hlZXQganVzdApzcGVjaWZpZXMgdGhlIHZlcnRpY2FsIGJsYW5raW5nIHBlcmlvZCBhbmQg aG9yaXpvbnRhbCBibGFua2luZyBwZXJpb2QKYW5kIGRvZXNuJ3QgYnJlYWsgdGhpbmdzIG91dC4g IEZvciBub3cgd2UnbGwgbGVhdmUgZXZlcnl0aGluZyBhcyBhCmZpeGVkIHZhbHVlIGJ1dCBqdXN0 IGFsbG93IGFkanVzdGluZyB0aGUgcGl4ZWwgY2xvY2suICBJJ3ZlIGFkZGVkIGEKY29tbWVudCBv biB3aGF0IHRoZSBkYXRhc2hlZXQgY2xhaW1zIHNvIHNvbWVvbmUgY291bGQgbGF0ZXIgZXhwYW5k CnRoaW5ncyB0byBmaXQgdGhlaXIgbmVlZHMgaWYgdGhleSB3YW50ZWQgdG8gdGVzdCBvdGhlciBi bGFua2luZwpwZXJpb2RzLgoKVGhlIGdvYWwgaGVyZSBpcyB0byBiZSBhYmxlIHRvIHNwZWNpZnkg dGhlIHBhbmVsIHRpbWluZ3MgaW4gdGhlIGRldmljZQp0cmVlIGZvciBzZXZlcmFsIHJrMzI4OCBD aHJvbWVib29rcyAobGlrZSByazMyODgtdmVyeW9uLWplcnJ5KS4gIFRoZXNlCkNocm9tZWJvb2tz IGhhdmUgYWxsIGJlZW4gcnVubmluZyBpbiB0aGUgZG93bnN0cmVhbSBrZXJuZWwgd2l0aCB0aGUK c3RhbmRhcmQgcG9yY2hlcyBhbmQgc3luYyBsZW5ndGhzIGJ1dCBqdXN0IHdpdGggYSBzbGlnaHRs eSBzbG93ZXIKcGl4ZWwgY2xvY2sgYmVjYXVzZSB0aGUgNzYuNDIgTUh6IGNsb2NrIGlzIG5vdCBh Y2hpZXZhYmxlIGZyb20gdGhlCmZpeGVkIFBMTCB0aGF0IHdhcyBhdmFpbGFibGUuICBUaGVzZSBD aHJvbWVib29rcyBvbmx5IGFjaGlldmUgYQpyZWZyZXNoIHJhdGUgb2YgfjU4IEh6LiAgV2hpbGUg aXQncyBwcm9iYWJsZSB0aGF0IHdlIGNvdWxkIGFkanVzdCB0aGUKdGltaW5ncyB0byBhY2hpZXZl IDYwIEh6IGl0J3MgcHJvYmFibHkgd2lzZXN0IHRvIG1hdGNoIHdoYXQncyBiZWVuCnJ1bm5pbmcg b24gdGhlc2UgZGV2aWNlcyBhbGwgdGhlc2UgeWVhcnMuCgpJJ2xsIG5vdGUgdGhhdCB0aG91Z2gg dGhlIHVwc3RyZWFtIGtlcm5lbCBoYXMgYWx3YXlzIHRyaWVkIHRvIGFjaGlldmUKNzYuNDIgTUh6 LCBpdCBoYXMgYWN0dWFsbHkgYmVlbiBydW5uaW5nIGF0IDc0LjI1IE1IeiBhbHNvIHNpbmNlIHRo ZQp2aWRlbyBwcm9jZXNzb3IgaXMgcGFyZW50ZWQgb2ZmIHRoZSBzYW1lIGZpeGVkIFBMTC4KCkNo YW5nZXMgaW4gdjQ6CiAtIGRpc3BsYXlfdGltaW5nIGZvciBJbm5vbHV4IG4xMTZiZ2UgbmV3IGZv ciB2NC4KCkNoYW5nZXMgaW4gdjU6CiAtIEFkZGVkIEhlaWtvJ3MgVGVzdGVkLWJ5CgpTaWduZWQt b2ZmLWJ5OiBEb3VnbGFzIEFuZGVyc29uIDxkaWFuZGVyc0BjaHJvbWl1bS5vcmc+ClRlc3RlZC1i eTogSGVpa28gU3R1ZWJuZXIgPGhlaWtvQHNudGVjaC5kZT4KLS0tCgogZHJpdmVycy9ncHUvZHJt L3BhbmVsL3BhbmVsLXNpbXBsZS5jIHwgMzcgKysrKysrKysrKysrKysrKystLS0tLS0tLS0tLQog MSBmaWxlIGNoYW5nZWQsIDIzIGluc2VydGlvbnMoKyksIDE0IGRlbGV0aW9ucygtKQoKZGlmZiAt LWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9wYW5lbC9wYW5lbC1zaW1wbGUuYyBiL2RyaXZlcnMvZ3B1 L2RybS9wYW5lbC9wYW5lbC1zaW1wbGUuYwppbmRleCBhZDRmNGFhYzJkNDQuLjdkNDA3ZmFiMzYy OCAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL3BhbmVsL3BhbmVsLXNpbXBsZS5jCisrKyBi L2RyaXZlcnMvZ3B1L2RybS9wYW5lbC9wYW5lbC1zaW1wbGUuYwpAQCAtMTU1MCwyMyArMTU1MCwz MiBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IHBhbmVsX2Rlc2MgaW5ub2x1eF9nMTIxeDFfbDAzID0g ewogCX0sCiB9OwogCi1zdGF0aWMgY29uc3Qgc3RydWN0IGRybV9kaXNwbGF5X21vZGUgaW5ub2x1 eF9uMTE2YmdlX21vZGUgPSB7Ci0JLmNsb2NrID0gNzY0MjAsCi0JLmhkaXNwbGF5ID0gMTM2NiwK LQkuaHN5bmNfc3RhcnQgPSAxMzY2ICsgMTM2LAotCS5oc3luY19lbmQgPSAxMzY2ICsgMTM2ICsg MzAsCi0JLmh0b3RhbCA9IDEzNjYgKyAxMzYgKyAzMCArIDYwLAotCS52ZGlzcGxheSA9IDc2OCwK LQkudnN5bmNfc3RhcnQgPSA3NjggKyA4LAotCS52c3luY19lbmQgPSA3NjggKyA4ICsgMTIsCi0J LnZ0b3RhbCA9IDc2OCArIDggKyAxMiArIDEyLAotCS52cmVmcmVzaCA9IDYwLAotCS5mbGFncyA9 IERSTV9NT0RFX0ZMQUdfTkhTWU5DIHwgRFJNX01PREVfRkxBR19OVlNZTkMsCisvKgorICogRGF0 YXNoZWV0IHNwZWNpZmllcyB0aGF0IGF0IDYwIEh6IHJlZnJlc2ggcmF0ZToKKyAqIC0gdG90YWwg aG9yaXpvbnRhbCB0aW1lOiB7IDE1MDYsIDE1OTIsIDE3MTYgfQorICogLSB0b3RhbCB2ZXJ0aWNh bCB0aW1lOiB7IDc4OCwgODAwLCA4NjggfQorICoKKyAqIC4uLmJ1dCBkb2Vzbid0IGdvIGludG8g ZXhhY3RseSBob3cgdGhhdCBzaG91bGQgYmUgc3BsaXQgaW50byBhIGZyb250CisgKiBwb3JjaCwg YmFjayBwb3JjaCwgb3Igc3luYyBsZW5ndGguICBGb3Igbm93IHdlJ2xsIGxlYXZlIGEgc2luZ2xl IHNldHRpbmcKKyAqIGhlcmUgd2hpY2ggYWxsb3dzIGEgYml0IG9mIHR3ZWFraW5nIG9mIHRoZSBw aXhlbCBjbG9jayBhdCB0aGUgZXhwZW5zZSBvZgorICogcmVmcmVzaCByYXRlLgorICovCitzdGF0 aWMgY29uc3Qgc3RydWN0IGRpc3BsYXlfdGltaW5nIGlubm9sdXhfbjExNmJnZV90aW1pbmcgPSB7 CisJLnBpeGVsY2xvY2sgPSB7IDcyNjAwMDAwLCA3NjQyMDAwMCwgODAyNDAwMDAgfSwKKwkuaGFj dGl2ZSA9IHsgMTM2NiwgMTM2NiwgMTM2NiB9LAorCS5oZnJvbnRfcG9yY2ggPSB7IDEzNiwgMTM2 LCAxMzYgfSwKKwkuaGJhY2tfcG9yY2ggPSB7IDYwLCA2MCwgNjAgfSwKKwkuaHN5bmNfbGVuID0g eyAzMCwgMzAsIDMwIH0sCisJLnZhY3RpdmUgPSB7IDc2OCwgNzY4LCA3NjggfSwKKwkudmZyb250 X3BvcmNoID0geyA4LCA4LCA4IH0sCisJLnZiYWNrX3BvcmNoID0geyAxMiwgMTIsIDEyIH0sCisJ LnZzeW5jX2xlbiA9IHsgMTIsIDEyLCAxMiB9LAorCS5mbGFncyA9IERJU1BMQVlfRkxBR1NfVlNZ TkNfTE9XIHwgRElTUExBWV9GTEFHU19IU1lOQ19MT1csCiB9OwogCiBzdGF0aWMgY29uc3Qgc3Ry dWN0IHBhbmVsX2Rlc2MgaW5ub2x1eF9uMTE2YmdlID0gewotCS5tb2RlcyA9ICZpbm5vbHV4X24x MTZiZ2VfbW9kZSwKLQkubnVtX21vZGVzID0gMSwKKwkudGltaW5ncyA9ICZpbm5vbHV4X24xMTZi Z2VfdGltaW5nLAorCS5udW1fdGltaW5ncyA9IDEsCiAJLmJwYyA9IDYsCiAJLnNpemUgPSB7CiAJ CS53aWR0aCA9IDI1NiwKLS0gCjIuMjEuMC4zOTIuZ2Y4ZjY3ODcxNTllLWdvb2cKCl9fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5n IGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVk ZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbA==