From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Jones Subject: Re: [PATCH v7 13/27] KVM: arm64/sve: Context switch the SVE registers Date: Thu, 4 Apr 2019 10:35:02 +0200 Message-ID: <20190404083502.b7a345l2gx3df2zk@kamzik.brq.redhat.com> References: <1553864452-15080-1-git-send-email-Dave.Martin@arm.com> <1553864452-15080-14-git-send-email-Dave.Martin@arm.com> <20190403200145.c2oep2hbugl7db5t@kamzik.brq.redhat.com> <20190404081008.GY3567@e103592.cambridge.arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id EE20D4A36C for ; Thu, 4 Apr 2019 04:35:08 -0400 (EDT) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JGMQvYPhUVmP for ; Thu, 4 Apr 2019 04:35:07 -0400 (EDT) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id BD13D4A320 for ; Thu, 4 Apr 2019 04:35:07 -0400 (EDT) Content-Disposition: inline In-Reply-To: <20190404081008.GY3567@e103592.cambridge.arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Dave Martin Cc: Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Zhang Lei , Julien Grall , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org List-Id: kvmarm@lists.cs.columbia.edu On Thu, Apr 04, 2019 at 09:10:08AM +0100, Dave Martin wrote: > On Wed, Apr 03, 2019 at 10:01:45PM +0200, Andrew Jones wrote: > > On Fri, Mar 29, 2019 at 01:00:38PM +0000, Dave Martin wrote: > > > In order to give each vcpu its own view of the SVE registers, this > > > patch adds context storage via a new sve_state pointer in struct > > > vcpu_arch. An additional member sve_max_vl is also added for each > > > vcpu, to determine the maximum vector length visible to the guest > > > and thus the value to be configured in ZCR_EL2.LEN while the vcpu > > > is active. This also determines the layout and size of the storage > > > in sve_state, which is read and written by the same backend > > > functions that are used for context-switching the SVE state for > > > host tasks. > > > > > > On SVE-enabled vcpus, SVE access traps are now handled by switching > > > in the vcpu's SVE context and disabling the trap before returning > > > to the guest. On other vcpus, the trap is not handled and an exit > > > back to the host occurs, where the handle_sve() fallback path > > > reflects an undefined instruction exception back to the guest, > > > consistently with the behaviour of non-SVE-capable hardware (as was > > > done unconditionally prior to this patch). > > > > > > No SVE handling is added on non-VHE-only paths, since VHE is an > > > architectural and Kconfig prerequisite of SVE. > > > > > > Signed-off-by: Dave Martin > > > Reviewed-by: Julien Thierry > > > Tested-by: zhang.lei > > > > > > --- > > > > > > Changes since v5: > > > > > > * [Julien Thierry, Julien Grall] Commit message typo fixes > > > > > > * [Mark Rutland] Rename trap_class to hsr_ec, for consistency with > > > existing code. > > > > > > * [Mark Rutland] Simplify condition for refusing to handle an > > > FPSIMD/SVE trap, using multiple if () statements for clarity. The > > > previous condition was a bit tortuous, and how that the static_key > > > checks have been hoisted out, it makes little difference to the > > > compiler how we express the condition here. > > > --- > > > arch/arm64/include/asm/kvm_host.h | 6 ++++ > > > arch/arm64/kvm/fpsimd.c | 5 +-- > > > arch/arm64/kvm/hyp/switch.c | 75 +++++++++++++++++++++++++++++---------- > > > 3 files changed, 66 insertions(+), 20 deletions(-) > > > > > > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h > > > index 22cf484..4fabfd2 100644 > > > --- a/arch/arm64/include/asm/kvm_host.h > > > +++ b/arch/arm64/include/asm/kvm_host.h > > > @@ -228,6 +228,8 @@ struct vcpu_reset_state { > > > > > > struct kvm_vcpu_arch { > > > struct kvm_cpu_context ctxt; > > > + void *sve_state; > > > + unsigned int sve_max_vl; > > > > > > /* HYP configuration */ > > > u64 hcr_el2; > > > @@ -323,6 +325,10 @@ struct kvm_vcpu_arch { > > > bool sysregs_loaded_on_cpu; > > > }; > > > > > > +/* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */ > > > +#define vcpu_sve_pffr(vcpu) ((void *)((char *)((vcpu)->arch.sve_state) + \ > > > + sve_ffr_offset((vcpu)->arch.sve_max_vl))) > > > > Maybe an inline function instead? > > I tried, but that requires the definition of struct kvm_vcpu to be > visible. I failed to get that here without circular #include problems, > and it looked tricky to fix. Ah, OK > > Since this is a small bit of code which is unlikely to get used by > accident, I decided it was OK to keep it as a macro. > > Can you see another way around this? Nope drew From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,USER_AGENT_NEOMUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A9B6C4360F for ; Thu, 4 Apr 2019 08:35:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DE578206DD for ; Thu, 4 Apr 2019 08:35:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="qDWeFCX7" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DE578206DD Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2ItqXmaWhreEIgXNW65NMbq3eR1gdhTL6JMv/PYjZlM=; b=qDWeFCX7OtjdZr yDuaFx1GH1l5VLnwKFO6rBlMbeDGVQfuo5spgA8ZUQoRGbWn1mceNE3hAanUPE5SfXqPvQbEGYBhR wcwYbARS3c/cUnNHhs6lcuWEiV5tdzCwWeTLyr6BCDCNpVUNubhNOpcj47w/7zHJIEv83lBIw9X7M yrfP2p73CpUlhI4O42I0YjcVeIwA9hQ+RDSFihiIVynN9pZ4hokit44+LA33wq1Ut9hp63zjK+zIu DfBIG72yFeNV6fls2ms6S8izeCzaxGvjSxlgT3HZ/Dxq0KVCbYTTvW0iK5WpjebQ1nyAoYbFztISO O3vSGS1UIOC9smqgNEAg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hBxq2-0008RS-TC; Thu, 04 Apr 2019 08:35:10 +0000 Received: from mx1.redhat.com ([209.132.183.28]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hBxpz-0008CN-AN for linux-arm-kernel@lists.infradead.org; Thu, 04 Apr 2019 08:35:08 +0000 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D7944C06A816; Thu, 4 Apr 2019 08:35:06 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 72E3C1001DF1; Thu, 4 Apr 2019 08:35:04 +0000 (UTC) Date: Thu, 4 Apr 2019 10:35:02 +0200 From: Andrew Jones To: Dave Martin Subject: Re: [PATCH v7 13/27] KVM: arm64/sve: Context switch the SVE registers Message-ID: <20190404083502.b7a345l2gx3df2zk@kamzik.brq.redhat.com> References: <1553864452-15080-1-git-send-email-Dave.Martin@arm.com> <1553864452-15080-14-git-send-email-Dave.Martin@arm.com> <20190403200145.c2oep2hbugl7db5t@kamzik.brq.redhat.com> <20190404081008.GY3567@e103592.cambridge.arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190404081008.GY3567@e103592.cambridge.arm.com> User-Agent: NeoMutt/20180716 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Thu, 04 Apr 2019 08:35:07 +0000 (UTC) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190404_013507_404812_611CC248 X-CRM114-Status: GOOD ( 31.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Zhang Lei , Julien Grall , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Apr 04, 2019 at 09:10:08AM +0100, Dave Martin wrote: > On Wed, Apr 03, 2019 at 10:01:45PM +0200, Andrew Jones wrote: > > On Fri, Mar 29, 2019 at 01:00:38PM +0000, Dave Martin wrote: > > > In order to give each vcpu its own view of the SVE registers, this > > > patch adds context storage via a new sve_state pointer in struct > > > vcpu_arch. An additional member sve_max_vl is also added for each > > > vcpu, to determine the maximum vector length visible to the guest > > > and thus the value to be configured in ZCR_EL2.LEN while the vcpu > > > is active. This also determines the layout and size of the storage > > > in sve_state, which is read and written by the same backend > > > functions that are used for context-switching the SVE state for > > > host tasks. > > > > > > On SVE-enabled vcpus, SVE access traps are now handled by switching > > > in the vcpu's SVE context and disabling the trap before returning > > > to the guest. On other vcpus, the trap is not handled and an exit > > > back to the host occurs, where the handle_sve() fallback path > > > reflects an undefined instruction exception back to the guest, > > > consistently with the behaviour of non-SVE-capable hardware (as was > > > done unconditionally prior to this patch). > > > > > > No SVE handling is added on non-VHE-only paths, since VHE is an > > > architectural and Kconfig prerequisite of SVE. > > > > > > Signed-off-by: Dave Martin > > > Reviewed-by: Julien Thierry > > > Tested-by: zhang.lei > > > > > > --- > > > > > > Changes since v5: > > > > > > * [Julien Thierry, Julien Grall] Commit message typo fixes > > > > > > * [Mark Rutland] Rename trap_class to hsr_ec, for consistency with > > > existing code. > > > > > > * [Mark Rutland] Simplify condition for refusing to handle an > > > FPSIMD/SVE trap, using multiple if () statements for clarity. The > > > previous condition was a bit tortuous, and how that the static_key > > > checks have been hoisted out, it makes little difference to the > > > compiler how we express the condition here. > > > --- > > > arch/arm64/include/asm/kvm_host.h | 6 ++++ > > > arch/arm64/kvm/fpsimd.c | 5 +-- > > > arch/arm64/kvm/hyp/switch.c | 75 +++++++++++++++++++++++++++++---------- > > > 3 files changed, 66 insertions(+), 20 deletions(-) > > > > > > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h > > > index 22cf484..4fabfd2 100644 > > > --- a/arch/arm64/include/asm/kvm_host.h > > > +++ b/arch/arm64/include/asm/kvm_host.h > > > @@ -228,6 +228,8 @@ struct vcpu_reset_state { > > > > > > struct kvm_vcpu_arch { > > > struct kvm_cpu_context ctxt; > > > + void *sve_state; > > > + unsigned int sve_max_vl; > > > > > > /* HYP configuration */ > > > u64 hcr_el2; > > > @@ -323,6 +325,10 @@ struct kvm_vcpu_arch { > > > bool sysregs_loaded_on_cpu; > > > }; > > > > > > +/* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */ > > > +#define vcpu_sve_pffr(vcpu) ((void *)((char *)((vcpu)->arch.sve_state) + \ > > > + sve_ffr_offset((vcpu)->arch.sve_max_vl))) > > > > Maybe an inline function instead? > > I tried, but that requires the definition of struct kvm_vcpu to be > visible. I failed to get that here without circular #include problems, > and it looked tricky to fix. Ah, OK > > Since this is a small bit of code which is unlikely to get used by > accident, I decided it was OK to keep it as a macro. > > Can you see another way around this? Nope drew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel