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From: Peter Zijlstra <peterz@infradead.org>
To: Thomas-Mich Richter <tmricht@linux.ibm.com>
Cc: Kees Cook <keescook@chromium.org>,
	acme@redhat.com,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Heiko Carstens <heiko.carstens@de.ibm.com>,
	Hendrik Brueckner <brueckner@linux.ibm.com>,
	Martin Schwidefsky <schwidefsky@de.ibm.com>
Subject: Re: WARN_ON_ONCE() hit at kernel/events/core.c:330
Date: Thu, 4 Apr 2019 14:13:36 +0200	[thread overview]
Message-ID: <20190404121336.GE14281@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20190404120214.GD14281@hirez.programming.kicks-ass.net>

On Thu, Apr 04, 2019 at 02:02:14PM +0200, Peter Zijlstra wrote:
> On Thu, Apr 04, 2019 at 01:09:09PM +0200, Peter Zijlstra wrote:
> > That is not entirely the scenario I talked about, but *groan*.
> > 
> > So what I meant was:
> > 
> > 	CPU-0							CPU-n
> > 
> > 	__schedule()
> > 	  local_irq_disable()
> > 
> > 	  ...
> > 	    deactivate_task(prev);
> > 
> > 								try_to_wake_up(@p)
> > 								  ...
> > 								  smp_cond_load_acquire(&p->on_cpu, !VAL);
> > 
> > 	  <PMI>
> > 	    ..
> > 	    perf_event_disable_inatomic()
> > 	      event->pending_disable = 1;
> > 	      irq_work_queue() /* self-IPI */
> > 	  </PMI>
> > 
> > 	  context_switch()
> > 	    prepare_task_switch()
> > 	      perf_event_task_sched_out()
> > 	        // the above chain that clears pending_disable
> > 
> > 	    finish_task_switch()
> > 	      finish_task()
> > 	        smp_store_release(prev->on_cpu, 0);
> > 								  /* finally.... */
> > 								// take woken
> > 								// context_switch to @p
> > 	      finish_lock_switch()
> > 	        raw_spin_unlock_irq()
> > 		/* w00t, IRQs enabled, self-IPI time */
> > 	        <self-IPI>
> > 		  perf_pending_event()
> > 		    // event->pending_disable == 0
> > 		</self-IPI>
> > 
> > 
> > What you're suggesting, is that the time between:
> > 
> >   smp_store_release(prev->on_cpu, 0);
> > 
> > and
> > 
> >   <self-IPI>
> > 
> > on CPU-0 is sufficient for CPU-n to context switch to the task, enable
> > the event there, trigger a PMI that calls perf_event_disable_inatomic()
> > _again_ (this would mean irq_work_queue() failing, which we don't check)
> > (and schedule out again, although that's not required).
> > 
> > This being virt that might actually be possible if (v)CPU-0 takes a nap
> > I suppose.
> > 
> > Let me think about this a little more...
> 
> Arghh... s390 doesn't implement arch_irq_work_raise(), which makes it
> far far worse.
> 
> I have a hack that might've cured it, were it not for that. Let me think
> more still..

Could you educate me on the s390 PMU, afaict only the SF one has a
sampling interrupt (cpumf_measurement_alert), is that NMI-like or a
regular IRQ ?

  reply	other threads:[~2019-04-04 12:13 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-03  9:47 WARN_ON_ONCE() hit at kernel/events/core.c:330 Thomas-Mich Richter
2019-04-03 10:41 ` Peter Zijlstra
2019-04-03 11:26   ` Thomas-Mich Richter
2019-04-04  9:15   ` Thomas-Mich Richter
2019-04-04 11:09     ` Peter Zijlstra
2019-04-04 12:02       ` Peter Zijlstra
2019-04-04 12:13         ` Peter Zijlstra [this message]
2019-04-04 13:03       ` Peter Zijlstra
2019-04-04 13:21         ` Thomas-Mich Richter
2019-04-05 10:18         ` Thomas-Mich Richter
2019-04-05 11:46           ` Peter Zijlstra
2019-04-08  7:12         ` Thomas-Mich Richter
2019-04-08  8:22           ` Peter Zijlstra
2019-04-08  8:47             ` Thomas-Mich Richter
2019-04-08  9:50             ` Peter Zijlstra
2019-04-08 13:28               ` Thomas-Mich Richter
2019-04-09  6:07               ` Thomas-Mich Richter
2019-04-09  8:29                 ` Peter Zijlstra
2019-04-09  8:53               ` Mark Rutland
2019-04-10 13:51                 ` Thomas-Mich Richter
2019-04-10 14:33                   ` Peter Zijlstra
2019-04-11 12:06                     ` Alexander Shishkin

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