From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH 3/3] ARM: dts: sunxi: Improve sun8i NAND transfers by using DMA Date: Fri, 5 Apr 2019 11:18:07 +0200 Message-ID: <20190405091807.itjp5uvsoqdfbm2u@flea> References: <20190404162111.22618-1-miquel.raynal@bootlin.com> <20190404162111.22618-4-miquel.raynal@bootlin.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8795330710686374329==" Return-path: In-Reply-To: <20190404162111.22618-4-miquel.raynal@bootlin.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Miquel Raynal Cc: Mark Rutland , devicetree@vger.kernel.org, Vignesh Raghavendra , Tudor Ambarus , Richard Weinberger , Marek Vasut , Chen-Yu Tsai , Rob Herring , linux-mtd@lists.infradead.org, Brian Norris , David Woodhouse , linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org --===============8795330710686374329== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="zxt6af7sseqqtpzx" Content-Disposition: inline --zxt6af7sseqqtpzx Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Apr 04, 2019 at 06:21:11PM +0200, Miquel Raynal wrote: > In the current state, sun8i NAND controllers use PIO during > transfers. Throughput can be increased thanks to the use of DMA > (mostly during reads, because of the ECC pipelining feature). > > Besides the usual addition of DMA DT properties, because the sun8i The only thing that "sun8i" means for Allwinner is that the SoC has Cortex-A7 CPUs. You need to be more precise than that, why not just use A33? Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --zxt6af7sseqqtpzx Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXKcdTwAKCRDj7w1vZxhR xUmzAQCKDC0g8ADDqtg9WA3GPGUGbhgce5qS43k7aWzTbWxHpAEAgjNT5JwA0RLl xWiPemPjxbnMMuWdZpeP70lgk6jSCQ4= =1KTO -----END PGP SIGNATURE----- --zxt6af7sseqqtpzx-- --===============8795330710686374329== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============8795330710686374329==-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, USER_AGENT_NEOMUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C977C4360F for ; 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Fri, 5 Apr 2019 09:18:07 +0000 (UTC) Date: Fri, 5 Apr 2019 11:18:07 +0200 From: Maxime Ripard To: Miquel Raynal Subject: Re: [PATCH 3/3] ARM: dts: sunxi: Improve sun8i NAND transfers by using DMA Message-ID: <20190405091807.itjp5uvsoqdfbm2u@flea> References: <20190404162111.22618-1-miquel.raynal@bootlin.com> <20190404162111.22618-4-miquel.raynal@bootlin.com> MIME-Version: 1.0 In-Reply-To: <20190404162111.22618-4-miquel.raynal@bootlin.com> User-Agent: NeoMutt/20180716 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190405_021812_150061_F716EA2F X-CRM114-Status: GOOD ( 11.74 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Vignesh Raghavendra , Tudor Ambarus , Richard Weinberger , Marek Vasut , Chen-Yu Tsai , Rob Herring , linux-mtd@lists.infradead.org, Brian Norris , David Woodhouse , linux-arm-kernel@lists.infradead.org Content-Type: multipart/mixed; boundary="===============1934532333957232040==" Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org --===============1934532333957232040== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="zxt6af7sseqqtpzx" Content-Disposition: inline --zxt6af7sseqqtpzx Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Apr 04, 2019 at 06:21:11PM +0200, Miquel Raynal wrote: > In the current state, sun8i NAND controllers use PIO during > transfers. Throughput can be increased thanks to the use of DMA > (mostly during reads, because of the ECC pipelining feature). > > Besides the usual addition of DMA DT properties, because the sun8i The only thing that "sun8i" means for Allwinner is that the SoC has Cortex-A7 CPUs. You need to be more precise than that, why not just use A33? Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --zxt6af7sseqqtpzx Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXKcdTwAKCRDj7w1vZxhR xUmzAQCKDC0g8ADDqtg9WA3GPGUGbhgce5qS43k7aWzTbWxHpAEAgjNT5JwA0RLl xWiPemPjxbnMMuWdZpeP70lgk6jSCQ4= =1KTO -----END PGP SIGNATURE----- --zxt6af7sseqqtpzx-- --===============1934532333957232040== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ --===============1934532333957232040==--