From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marcel Ziswiler Date: Tue, 9 Apr 2019 17:24:12 +0200 Subject: [U-Boot] [PATCH v2 06/14] board: imx6ull: Add disable PMIC_STBY_REQ In-Reply-To: <20190409152420.11394-1-marcel@ziswiler.com> References: <20190409152420.11394-1-marcel@ziswiler.com> Message-ID: <20190409152420.11394-7-marcel@ziswiler.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Philippe Schenker Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the SOC to request for a lower voltage during sleep. This is necessary because the voltage is changing too slow for the SOC to wake up properly. Signed-off-by: Philippe Schenker Acked-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- Changes in v2: - Added Igor's reviewed-by. board/toradex/colibri-imx6ull/colibri-imx6ull.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/board/toradex/colibri-imx6ull/colibri-imx6ull.c b/board/toradex/colibri-imx6ull/colibri-imx6ull.c index b6f45edb86..f1d5cc6655 100644 --- a/board/toradex/colibri-imx6ull/colibri-imx6ull.c +++ b/board/toradex/colibri-imx6ull/colibri-imx6ull.c @@ -50,6 +50,8 @@ DECLARE_GLOBAL_DATA_PTR; #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \ PAD_CTL_DSE_48ohm) +#define MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR 0x2290040 + #define NAND_PAD_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_SRE_SLOW | PAD_CTL_HYS) #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_PUS_22K_UP) @@ -331,6 +333,14 @@ int board_late_init(void) env_set("variant", "-wifi"); #endif + /* + * Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the + * SOC to request for a lower voltage during sleep. This is necessary + * because the voltage is changing too slow for the SOC to wake up + * properly. + */ + __raw_writel(0x8080, MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR); + #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif -- 2.20.1