From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:51503) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEYH3-0007Fh-Un for qemu-devel@nongnu.org; Thu, 11 Apr 2019 07:53:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEYH2-0007b9-UJ for qemu-devel@nongnu.org; Thu, 11 Apr 2019 07:53:45 -0400 Date: Thu, 11 Apr 2019 13:53:38 +0200 From: Igor Mammedov Message-ID: <20190411135338.535472e2@redhat.com> In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH for 4.1 v3 4/6] riscv: virt: Allow specifying a CPU via commandline List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis Cc: "qemu-devel@nongnu.org" , "qemu-riscv@nongnu.org" , "alistair23@gmail.com" , "palmer@sifive.com" , "ijc@hellion.org.uk" On Wed, 10 Apr 2019 23:10:42 +0000 Alistair Francis wrote: > Signed-off-by: Alistair Francis Reviewed-by: Igor Mammedov > --- > hw/riscv/virt.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index fc4c6b306e..5b25f028ad 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -400,7 +400,7 @@ static void riscv_virt_board_init(MachineState *machine) > /* Initialize SOC */ > object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), > TYPE_RISCV_HART_ARRAY, &error_abort, NULL); > - object_property_set_str(OBJECT(&s->soc), VIRT_CPU, "cpu-type", > + object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", > &error_abort); > object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", > &error_abort); > @@ -526,6 +526,7 @@ static void riscv_virt_board_machine_init(MachineClass *mc) > mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)"; > mc->init = riscv_virt_board_init; > mc->max_cpus = 8; /* hardcoded limit in BBL */ > + mc->default_cpu_type = VIRT_CPU; > } > > DEFINE_MACHINE("virt", riscv_virt_board_machine_init) From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D063C10F13 for ; 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Thu, 11 Apr 2019 07:53:45 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59104) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hEYH2-0007al-MO; Thu, 11 Apr 2019 07:53:44 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id DD8DA99CE2; Thu, 11 Apr 2019 11:53:43 +0000 (UTC) Received: from localhost (unknown [10.43.2.182]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8A3CA5D719; Thu, 11 Apr 2019 11:53:42 +0000 (UTC) Date: Thu, 11 Apr 2019 13:53:38 +0200 From: Igor Mammedov To: Alistair Francis Message-ID: <20190411135338.535472e2@redhat.com> In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Thu, 11 Apr 2019 11:53:43 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: Re: [Qemu-devel] [PATCH for 4.1 v3 4/6] riscv: virt: Allow specifying a CPU via commandline X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "alistair23@gmail.com" , "palmer@sifive.com" , "qemu-riscv@nongnu.org" , "qemu-devel@nongnu.org" , "ijc@hellion.org.uk" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Message-ID: <20190411115338.uv-gdpMZBFYNM24UsR6G9szTq9CFS7m040dNPFrjlXE@z> On Wed, 10 Apr 2019 23:10:42 +0000 Alistair Francis wrote: > Signed-off-by: Alistair Francis Reviewed-by: Igor Mammedov > --- > hw/riscv/virt.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index fc4c6b306e..5b25f028ad 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -400,7 +400,7 @@ static void riscv_virt_board_init(MachineState *machine) > /* Initialize SOC */ > object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), > TYPE_RISCV_HART_ARRAY, &error_abort, NULL); > - object_property_set_str(OBJECT(&s->soc), VIRT_CPU, "cpu-type", > + object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", > &error_abort); > object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", > &error_abort); > @@ -526,6 +526,7 @@ static void riscv_virt_board_machine_init(MachineClass *mc) > mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)"; > mc->init = riscv_virt_board_init; > mc->max_cpus = 8; /* hardcoded limit in BBL */ > + mc->default_cpu_type = VIRT_CPU; > } > > DEFINE_MACHINE("virt", riscv_virt_board_machine_init) From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.71) id 1hEZNh-0007LG-Oh for mharc-qemu-riscv@gnu.org; Thu, 11 Apr 2019 09:04:41 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51530) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEYH5-0007Gf-Sa for qemu-riscv@nongnu.org; Thu, 11 Apr 2019 07:53:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEYH4-0007c2-Uk for qemu-riscv@nongnu.org; Thu, 11 Apr 2019 07:53:47 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59104) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hEYH2-0007al-MO; Thu, 11 Apr 2019 07:53:44 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id DD8DA99CE2; Thu, 11 Apr 2019 11:53:43 +0000 (UTC) Received: from localhost (unknown [10.43.2.182]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8A3CA5D719; Thu, 11 Apr 2019 11:53:42 +0000 (UTC) Date: Thu, 11 Apr 2019 13:53:38 +0200 From: Igor Mammedov To: Alistair Francis Cc: "qemu-devel@nongnu.org" , "qemu-riscv@nongnu.org" , "alistair23@gmail.com" , "palmer@sifive.com" , "ijc@hellion.org.uk" Message-ID: <20190411135338.535472e2@redhat.com> In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Thu, 11 Apr 2019 11:53:43 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 X-Mailman-Approved-At: Thu, 11 Apr 2019 09:04:39 -0400 Subject: Re: [Qemu-riscv] [Qemu-devel] [PATCH for 4.1 v3 4/6] riscv: virt: Allow specifying a CPU via commandline X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Apr 2019 11:53:48 -0000 On Wed, 10 Apr 2019 23:10:42 +0000 Alistair Francis wrote: > Signed-off-by: Alistair Francis Reviewed-by: Igor Mammedov > --- > hw/riscv/virt.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index fc4c6b306e..5b25f028ad 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -400,7 +400,7 @@ static void riscv_virt_board_init(MachineState *machine) > /* Initialize SOC */ > object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), > TYPE_RISCV_HART_ARRAY, &error_abort, NULL); > - object_property_set_str(OBJECT(&s->soc), VIRT_CPU, "cpu-type", > + object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", > &error_abort); > object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", > &error_abort); > @@ -526,6 +526,7 @@ static void riscv_virt_board_machine_init(MachineClass *mc) > mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)"; > mc->init = riscv_virt_board_init; > mc->max_cpus = 8; /* hardcoded limit in BBL */ > + mc->default_cpu_type = VIRT_CPU; > } > > DEFINE_MACHINE("virt", riscv_virt_board_machine_init)