Re: [PATCH 2/3] riscv: Add support for perf registers sampling

From: Christoph Hellwig <hch@infradead.org>
To: Mao Han <han_mao@c-sky.com>
Cc: Christoph Hellwig <hch@infradead.org>,
	linux-kernel@vger.kernel.org, guoren@kernel.org
Subject: Re: [PATCH 2/3] riscv: Add support for perf registers sampling
Date: Sat, 13 Apr 2019 01:01:58 -0700	[thread overview]
Message-ID: <20190413080158.GA3891@infradead.org> (raw)
In-Reply-To: <20190412093851.GA4961@vmh-VirtualBox>

On Fri, Apr 12, 2019 at 05:38:53PM +0800, Mao Han wrote:
> > 
> > > +	fp = user_backtrace(entry, fp, regs->ra);
> > > +	while ((entry->nr < entry->max_stack) &&
> > > +		fp && !((unsigned long)fp & 0x3))
> > > +		fp = user_backtrace(entry, fp, 0);
> > 
> > Please don't indent the condition continuation and the loop body
> > by the same amount.
> 
> Like this?
> 	while ((entry->nr < entry->max_stack) &&
> 					fp && !((unsigned long)fp & 0x3))
> 		fp = user_backtrace(entry, fp, 0);

We tend to either use indentations to the same level as the condition,
or two tabs indents.  But I also noticed that we shouldn't even need
the cast here as fp already is unsigned long, so it should all fit on
one line anyway:

	while (fp && !(fp & 0x3) && entry->nr < entry->max_stack)
		fp = user_backtrace(entry, fp, 0);