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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 20/26] target/arm: New helper function arm_v7m_mmu_idx_all()
Date: Tue, 16 Apr 2019 13:57:38 +0100	[thread overview]
Message-ID: <20190416125744.27770-21-peter.maydell@linaro.org> (raw)
In-Reply-To: <20190416125744.27770-1-peter.maydell@linaro.org>

Add a new helper function which returns the MMU index to use
for v7M, where the caller specifies all of the security
state, privilege level and whether the execution priority
is negative, and reimplement the existing
arm_v7m_mmu_idx_for_secstate_and_priv() in terms of it.

We are going to need this for the lazy-FP-stacking code.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
Suggestions for better function name welcome.
arm_v7m_mmu_idx_for_secstate_and_priv_and_negpri()
just seems way too long and unwieldy...
---
 target/arm/cpu.h    |  7 +++++++
 target/arm/helper.c | 14 +++++++++++---
 2 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 500e0ab4c5d..0a1b82dc996 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2912,6 +2912,13 @@ static inline int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx)
     }
 }
 
+/*
+ * Return the MMU index for a v7M CPU with all relevant information
+ * manually specified.
+ */
+ARMMMUIdx arm_v7m_mmu_idx_all(CPUARMState *env,
+                              bool secstate, bool priv, bool negpri);
+
 /* Return the MMU index for a v7M CPU in the specified security and
  * privilege state.
  */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 2feb3f664fe..c8e30b40366 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -13235,8 +13235,8 @@ int fp_exception_el(CPUARMState *env, int cur_el)
     return 0;
 }
 
-ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env,
-                                                bool secstate, bool priv)
+ARMMMUIdx arm_v7m_mmu_idx_all(CPUARMState *env,
+                              bool secstate, bool priv, bool negpri)
 {
     ARMMMUIdx mmu_idx = ARM_MMU_IDX_M;
 
@@ -13244,7 +13244,7 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env,
         mmu_idx |= ARM_MMU_IDX_M_PRIV;
     }
 
-    if (armv7m_nvic_neg_prio_requested(env->nvic, secstate)) {
+    if (negpri) {
         mmu_idx |= ARM_MMU_IDX_M_NEGPRI;
     }
 
@@ -13255,6 +13255,14 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env,
     return mmu_idx;
 }
 
+ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env,
+                                                bool secstate, bool priv)
+{
+    bool negpri = armv7m_nvic_neg_prio_requested(env->nvic, secstate);
+
+    return arm_v7m_mmu_idx_all(env, secstate, priv, negpri);
+}
+
 /* Return the MMU index for a v7M CPU in the specified security state */
 ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate)
 {
-- 
2.20.1

  parent reply	other threads:[~2019-04-16 12:58 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-16 12:57 [Qemu-devel] [PATCH 00/26] target/arm: Implement M profile floating point Peter Maydell
2019-04-16 12:57 ` [Qemu-devel] [PATCH 01/26] target/arm: Make sure M-profile FPSCR RES0 bits are not settable Peter Maydell
2019-04-23 17:25   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 02/26] hw/intc/armv7m_nvic: Allow reading of M-profile MVFR* registers Peter Maydell
2019-04-23 17:27   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 03/26] target/arm: Implement dummy versions of M-profile FP-related registers Peter Maydell
2019-04-23 17:55   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 04/26] target/arm: Disable most VFP sysregs for M-profile Peter Maydell
2019-04-23 18:08   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 05/26] target/arm: Honour M-profile FP enable bits Peter Maydell
2019-04-23 18:19   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 06/26] target/arm: Decode FP instructions for M profile Peter Maydell
2019-04-23 18:37   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 07/26] target/arm: Clear CONTROL_S.SFPA in SG insn if FPU present Peter Maydell
2019-04-23 20:58   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 08/26] target/arm: Handle SFPA and FPCA bits in reads and writes of CONTROL Peter Maydell
2019-04-23 21:33   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 09/26] target/arm/helper: don't return early for STKOF faults during stacking Peter Maydell
2019-04-23 21:46   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 10/26] target/arm: Handle floating point registers in exception entry Peter Maydell
2019-04-23 22:21   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 11/26] target/arm: Implement v7m_update_fpccr() Peter Maydell
2019-04-16 12:57 ` [Qemu-devel] [PATCH 12/26] target/arm: Clear CONTROL.SFPA in BXNS and BLXNS Peter Maydell
2019-04-23 22:50   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 13/26] target/arm: Clean excReturn bits when tail chaining Peter Maydell
2019-04-23 22:54   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 14/26] target/arm: Allow for floating point in callee stack integrity check Peter Maydell
2019-04-23 23:04   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 15/26] target/arm: Handle floating point registers in exception return Peter Maydell
2019-04-23 23:29   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 16/26] target/arm: Move NS TBFLAG from bit 19 to bit 6 Peter Maydell
2019-04-23 23:47   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 17/26] target/arm: Overlap VECSTRIDE and XSCALE_CPAR TB flags Peter Maydell
2019-04-23 23:51   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 18/26] target/arm: Set FPCCR.S when executing M-profile floating point insns Peter Maydell
2019-04-24  0:00   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 19/26] target/arm: Activate M-profile floating point context when FPCCR.ASPEN is set Peter Maydell
2019-04-24  0:08   ` Richard Henderson
2019-04-16 12:57 ` Peter Maydell [this message]
2019-04-24  0:12   ` [Qemu-devel] [PATCH 20/26] target/arm: New helper function arm_v7m_mmu_idx_all() Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 21/26] target/arm: New function armv7m_nvic_set_pending_lazyfp() Peter Maydell
2019-04-24  1:10   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 22/26] target/arm: Add lazy-FP-stacking support to v7m_stack_write() Peter Maydell
2019-04-24  1:27   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 23/26] target/arm: Implement M-profile lazy FP state preservation Peter Maydell
2019-04-24  2:04   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 24/26] target/arm: Implement VLSTM for v7M CPUs with an FPU Peter Maydell
2019-04-24  2:17   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 25/26] target/arm: Implement VLLDM " Peter Maydell
2019-04-24  2:21   ` Richard Henderson
2019-04-16 12:57 ` [Qemu-devel] [PATCH 26/26] target/arm: Enable FPU for Cortex-M4 and Cortex-M33 Peter Maydell
2019-04-24  2:25   ` Richard Henderson

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