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From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= <clg@kaod.org>
To: openbmc@lists.ozlabs.org
Cc: Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
 =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= <clg@kaod.org>
Subject: [PATCH dev-5.0 0/4] spi-nor: aspeed: add support for the 4B opcodes
Date: Wed, 17 Apr 2019 15:39:37 +0200
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Here is a little series providing cleanups on the Aspeed SMC Controller
driver and adding support for the 4B opcodes which were recently added
to the Linux kernels 5.0.x.

The use of the 4B opcodes was breaking the read of the golden buffer
done at slow speed in the optimization read sequence. The code assumed
that the chip was in 4B address mode, as if a EN4B opcode had been
sent, but this is not the case anymore with 4B opcodes. The golden
buffer is now read with a SPINOR_OP_READ_4B (0x13) when the chip
supports 4B opcodes.

It should fix accesses to the palmetto PNOR and the Witherspoon BMC
flash modules.


*Please test !*

Thanks,

C.


Cédric Le Goater (4):
  mtd: spi-nor: aspeed: introduce a aspeed_smc_default_read() helper
  mtd: spi-nor: aspeed: clarify 4BYTE address mode mask
  mtd: spi-nor: aspeed: use memcpy_fromio() to capture the optimization
    buffer
  mtd: spi-nor: aspeed: add support for the 4B opcodes

 drivers/mtd/spi-nor/aspeed-smc.c | 40 +++++++++++++++++++++++---------
 1 file changed, 29 insertions(+), 11 deletions(-)

-- 
2.20.1