[PATCH 1/2] drm/i915: Stop overwriting RING_IMR in rcs resume

[PATCH 1/2] drm/i915: Stop overwriting RING_IMR in rcs resume

[Chris Wilson]

We store the engine->imr mask and set up the RING_IMR register on
restarting the engine. We do not then want to overwrite it with
an incomplete mask later as we may then lose interrupts!

Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 029fd8ec1857..00bd9eeb053d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -873,9 +873,6 @@ static int init_render_ring(struct intel_engine_cs *engine)
 	if (IS_GEN_RANGE(dev_priv, 6, 7))
 		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
 
-	if (INTEL_GEN(dev_priv) >= 6)
-		ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask);
-
 	return 0;
 }
 
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH 2/2] drm/i915: Setup the RCS ring prior to execution

[Chris Wilson]

We need to set the various ring registers prior to restarting the
engine, or else we may restart it after reset/resume in an ill-defined
state.

Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 00bd9eeb053d..3844581f622c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -831,9 +831,6 @@ static int intel_rcs_ctx_init(struct i915_request *rq)
 static int init_render_ring(struct intel_engine_cs *engine)
 {
 	struct drm_i915_private *dev_priv = engine->i915;
-	int ret = init_ring_common(engine);
-	if (ret)
-		return ret;
 
 	/* WaTimedSingleVertexDispatch:cl,bw,ctg,elk,ilk,snb */
 	if (IS_GEN_RANGE(dev_priv, 4, 6))
@@ -873,7 +870,7 @@ static int init_render_ring(struct intel_engine_cs *engine)
 	if (IS_GEN_RANGE(dev_priv, 6, 7))
 		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
 
-	return 0;
+	return init_ring_common(engine);
 }
 
 static void cancel_requests(struct intel_engine_cs *engine)
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 1/2] drm/i915: Stop overwriting RING_IMR in rcs resume

[Tvrtko Ursulin]

On 18/04/2019 14:27, Chris Wilson wrote:
> We store the engine->imr mask and set up the RING_IMR register on
> restarting the engine. We do not then want to overwrite it with
> an incomplete mask later as we may then lose interrupts!
> 
> Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_ringbuffer.c | 3 ---
>   1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 029fd8ec1857..00bd9eeb053d 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -873,9 +873,6 @@ static int init_render_ring(struct intel_engine_cs *engine)
>   	if (IS_GEN_RANGE(dev_priv, 6, 7))
>   		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
>   
> -	if (INTEL_GEN(dev_priv) >= 6)
> -		ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask);
> -
>   	return 0;
>   }
>   
> 

Is it perhaps a way to enable L3_DPF on IVB and HSW when breadcrumbs are 
off (no one listening)? Mind you, the same should be done in this case 
under execlists for ctx switch irq. I just can't find the code there 
which unmasks it unless a single engine->irq_enable/irq_disable cycle is 
guaranteed on load indirectly. Is there a request_wait or wait_for_idle 
hidden somewhere during init? Or I missed the ball completely?

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 1/2] drm/i915: Stop overwriting RING_IMR in rcs resume

[Chris Wilson]

Quoting Tvrtko Ursulin (2019-04-18 15:34:09)
> 
> On 18/04/2019 14:27, Chris Wilson wrote:
> > We store the engine->imr mask and set up the RING_IMR register on
> > restarting the engine. We do not then want to overwrite it with
> > an incomplete mask later as we may then lose interrupts!
> > 
> > Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > ---
> >   drivers/gpu/drm/i915/intel_ringbuffer.c | 3 ---
> >   1 file changed, 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 029fd8ec1857..00bd9eeb053d 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -873,9 +873,6 @@ static int init_render_ring(struct intel_engine_cs *engine)
> >       if (IS_GEN_RANGE(dev_priv, 6, 7))
> >               I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
> >   
> > -     if (INTEL_GEN(dev_priv) >= 6)
> > -             ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask);
> > -
> >       return 0;
> >   }
> >   
> > 
> 
> Is it perhaps a way to enable L3_DPF on IVB and HSW when breadcrumbs are 
> off (no one listening)? Mind you, the same should be done in this case 
> under execlists for ctx switch irq. I just can't find the code there 
> which unmasks it unless a single engine->irq_enable/irq_disable cycle is 
> guaranteed on load indirectly. Is there a request_wait or wait_for_idle 
> hidden somewhere during init? Or I missed the ball completely?

See intel_engine_reset_breadcrumbs(), we always re-emit the breadcrumb
setup (IMR) for either the disabled or enabled state. That should make
sure engine->irq_keep_mask is applied.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 1/2] drm/i915: Stop overwriting RING_IMR in rcs resume

[Tvrtko Ursulin]

On 18/04/2019 15:59, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-04-18 15:34:09)
>>
>> On 18/04/2019 14:27, Chris Wilson wrote:
>>> We store the engine->imr mask and set up the RING_IMR register on
>>> restarting the engine. We do not then want to overwrite it with
>>> an incomplete mask later as we may then lose interrupts!
>>>
>>> Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>> ---
>>>    drivers/gpu/drm/i915/intel_ringbuffer.c | 3 ---
>>>    1 file changed, 3 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> index 029fd8ec1857..00bd9eeb053d 100644
>>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> @@ -873,9 +873,6 @@ static int init_render_ring(struct intel_engine_cs *engine)
>>>        if (IS_GEN_RANGE(dev_priv, 6, 7))
>>>                I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
>>>    
>>> -     if (INTEL_GEN(dev_priv) >= 6)
>>> -             ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask);
>>> -
>>>        return 0;
>>>    }
>>>    
>>>
>>
>> Is it perhaps a way to enable L3_DPF on IVB and HSW when breadcrumbs are
>> off (no one listening)? Mind you, the same should be done in this case
>> under execlists for ctx switch irq. I just can't find the code there
>> which unmasks it unless a single engine->irq_enable/irq_disable cycle is
>> guaranteed on load indirectly. Is there a request_wait or wait_for_idle
>> hidden somewhere during init? Or I missed the ball completely?
> 
> See intel_engine_reset_breadcrumbs(), we always re-emit the breadcrumb
> setup (IMR) for either the disabled or enabled state. That should make
> sure engine->irq_keep_mask is applied.

Ah.. thanks! Although it is a bit conceptually wrong that breadcrumbs 
have to do the basic/unrelated engine setup. As such the legacy 
submission indeed looks more correct, but still wrong that engine reset 
can turn off user interrupts. Blah.. another pedestrian task for a rainy 
day.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 2/2] drm/i915: Setup the RCS ring prior to execution

[Tvrtko Ursulin]

On 18/04/2019 14:27, Chris Wilson wrote:
> We need to set the various ring registers prior to restarting the
> engine, or else we may restart it after reset/resume in an ill-defined
> state.
> 
> Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +----
>   1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 00bd9eeb053d..3844581f622c 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -831,9 +831,6 @@ static int intel_rcs_ctx_init(struct i915_request *rq)
>   static int init_render_ring(struct intel_engine_cs *engine)
>   {
>   	struct drm_i915_private *dev_priv = engine->i915;
> -	int ret = init_ring_common(engine);
> -	if (ret)
> -		return ret;
>   
>   	/* WaTimedSingleVertexDispatch:cl,bw,ctg,elk,ilk,snb */
>   	if (IS_GEN_RANGE(dev_priv, 4, 6))
> @@ -873,7 +870,7 @@ static int init_render_ring(struct intel_engine_cs *engine)
>   	if (IS_GEN_RANGE(dev_priv, 6, 7))
>   		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
>   
> -	return 0;
> +	return init_ring_common(engine);
>   }
>   
>   static void cancel_requests(struct intel_engine_cs *engine)
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 1/2] drm/i915: Stop overwriting RING_IMR in rcs resume

[Chris Wilson]

Quoting Tvrtko Ursulin (2019-04-18 16:08:58)
> 
> On 18/04/2019 15:59, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-04-18 15:34:09)
> >>
> >> On 18/04/2019 14:27, Chris Wilson wrote:
> >>> We store the engine->imr mask and set up the RING_IMR register on
> >>> restarting the engine. We do not then want to overwrite it with
> >>> an incomplete mask later as we may then lose interrupts!
> >>>
> >>> Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> >>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>> ---
> >>>    drivers/gpu/drm/i915/intel_ringbuffer.c | 3 ---
> >>>    1 file changed, 3 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >>> index 029fd8ec1857..00bd9eeb053d 100644
> >>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> >>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >>> @@ -873,9 +873,6 @@ static int init_render_ring(struct intel_engine_cs *engine)
> >>>        if (IS_GEN_RANGE(dev_priv, 6, 7))
> >>>                I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
> >>>    
> >>> -     if (INTEL_GEN(dev_priv) >= 6)
> >>> -             ENGINE_WRITE(engine, RING_IMR, ~engine->irq_keep_mask);
> >>> -
> >>>        return 0;
> >>>    }
> >>>    
> >>>
> >>
> >> Is it perhaps a way to enable L3_DPF on IVB and HSW when breadcrumbs are
> >> off (no one listening)? Mind you, the same should be done in this case
> >> under execlists for ctx switch irq. I just can't find the code there
> >> which unmasks it unless a single engine->irq_enable/irq_disable cycle is
> >> guaranteed on load indirectly. Is there a request_wait or wait_for_idle
> >> hidden somewhere during init? Or I missed the ball completely?
> > 
> > See intel_engine_reset_breadcrumbs(), we always re-emit the breadcrumb
> > setup (IMR) for either the disabled or enabled state. That should make
> > sure engine->irq_keep_mask is applied.
> 
> Ah.. thanks! Although it is a bit conceptually wrong that breadcrumbs 
> have to do the basic/unrelated engine setup. As such the legacy 
> submission indeed looks more correct, but still wrong that engine reset 
> can turn off user interrupts. Blah.. another pedestrian task for a rainy 
> day.

I kind of agree, but it's quite tangled up -- how dare they put extra
state in my breadcrumb register :)

Take the view that breadcrumbs is a badly named RING_IMR wrapper. Maybe
you can find an angle there.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Stop overwriting RING_IMR in rcs resume

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Stop overwriting RING_IMR in rcs resume
URL   : https://patchwork.freedesktop.org/series/59713/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5953 -> Patchwork_12834
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/59713/revisions/1/mbox/

Known issues
------------

  Here are the changes found in Patchwork_12834 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_contexts:
    - fi-bdw-gvtdvm:      PASS -> DMESG-FAIL [fdo#110235 ]

  * igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
    - fi-glk-dsi:         PASS -> INCOMPLETE [fdo#103359] / [k.org#198133]

  
#### Possible fixes ####

  * igt@kms_pipe_crc_basic@read-crc-pipe-b:
    - fi-byt-clapper:     FAIL [fdo#103191] -> PASS +1

  
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#110235 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (50 -> 33)
------------------------------

  Missing    (17): fi-ilk-m540 fi-bxt-dsi fi-bsw-n3050 fi-byt-j1900 fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-apl-guc fi-kbl-guc fi-ctg-p8600 fi-hsw-4770 fi-bxt-j4205 fi-icl-y fi-bdw-samus fi-bsw-kefka fi-skl-6700k2 fi-kbl-r 


Build changes
-------------

  * Linux: CI_DRM_5953 -> Patchwork_12834

  CI_DRM_5953: 7ab8969b77f4f10172e3836b6d5c1d917f7e4007 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4957: a765aa108105804c19096554447ad0cb71f64fc3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12834: a7a8a8552578ec852ffa5e7eaebe80ef55e1a701 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

a7a8a8552578 drm/i915: Setup the RCS ring prior to execution
a6025c2c32ab drm/i915: Stop overwriting RING_IMR in rcs resume

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12834/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Stop overwriting RING_IMR in rcs resume

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Stop overwriting RING_IMR in rcs resume
URL   : https://patchwork.freedesktop.org/series/59713/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5953_full -> Patchwork_12834_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_12834_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@audio@hdmi-integrity}:
    - shard-iclb:         NOTRUN -> FAIL

  
Known issues
------------

  Here are the changes found in Patchwork_12834_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_parse@basic-allocation:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109289]

  * igt@gem_exec_store@basic-bsd2:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] +49

  * igt@gem_pwrite@huge-gtt-forwards:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109290] +1

  * igt@i915_pm_rpm@modeset-pc8-residency-stress:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109293]

  * igt@i915_pm_rpm@system-suspend-execbuf:
    - shard-skl:          NOTRUN -> INCOMPLETE [fdo#104108] / [fdo#107773] / [fdo#107807]

  * igt@kms_atomic_transition@6x-modeset-transitions:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109278] +4

  * igt@kms_atomic_transition@6x-modeset-transitions-fencing:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +4

  * igt@kms_busy@extended-modeset-hang-oldfb-render-e:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +6
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +2

  * igt@kms_chamelium@vga-hpd-after-suspend:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109284] +3

  * igt@kms_cursor_crc@cursor-512x170-onscreen:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109279]

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109274] +2

  * igt@kms_dp_dsc@basic-dsc-enable-dp:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109349]

  * igt@kms_flip_tiling@flip-changes-tiling-yf:
    - shard-skl:          PASS -> FAIL [fdo#108228] / [fdo#108303]

  * igt@kms_force_connector_basic@force-edid:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109285]

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
    - shard-iclb:         PASS -> FAIL [fdo#103167] +1

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt:
    - shard-iclb:         PASS -> INCOMPLETE [fdo#106978] / [fdo#107713]

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-render:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] +38

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-render:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109280] +16

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] +41

  * igt@kms_lease@setcrtc_implicit_plane:
    - shard-snb:          NOTRUN -> FAIL [fdo#110281]

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-apl:          PASS -> DMESG-WARN [fdo#108566] +1

  * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
    - shard-glk:          PASS -> SKIP [fdo#109271]

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-iclb:         NOTRUN -> INCOMPLETE [fdo#107713] / [fdo#110042]

  * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
    - shard-apl:          NOTRUN -> FAIL [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          PASS -> FAIL [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
    - shard-skl:          NOTRUN -> FAIL [fdo#108145] +1

  * igt@kms_plane_alpha_blend@pipe-c-alpha-basic:
    - shard-kbl:          NOTRUN -> FAIL [fdo#108145]

  * igt@kms_plane_lowres@pipe-a-tiling-x:
    - shard-iclb:         PASS -> FAIL [fdo#103166]

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         PASS -> SKIP [fdo#109642]

  * igt@kms_psr@psr2_basic:
    - shard-iclb:         PASS -> SKIP [fdo#109441] +2

  * igt@kms_psr@psr2_primary_page_flip:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109441]

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-kbl:          PASS -> DMESG-FAIL [fdo#105763]

  * igt@kms_rotation_crc@multiplane-rotation-cropping-top:
    - shard-kbl:          PASS -> FAIL [fdo#109016]

  * igt@kms_setmode@basic:
    - shard-apl:          PASS -> FAIL [fdo#99912]
    - shard-iclb:         NOTRUN -> FAIL [fdo#99912]
    - shard-kbl:          PASS -> FAIL [fdo#99912]

  * igt@kms_sysfs_edid_timing:
    - shard-iclb:         PASS -> FAIL [fdo#100047]

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-kbl:          PASS -> DMESG-WARN [fdo#108566]

  * igt@kms_vblank@pipe-c-query-forked-hang:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +4

  * igt@perf_pmu@busy-accuracy-50-vcs1:
    - shard-skl:          NOTRUN -> SKIP [fdo#109271] +94

  * igt@prime_nv_pcopy@test3_4:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109291]

  * igt@prime_vgem@fence-wait-bsd1:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109276] +9

  * igt@v3d_get_param@get-bad-flags:
    - shard-iclb:         NOTRUN -> SKIP [fdo#109315]

  
#### Possible fixes ####

  * igt@gem_eio@in-flight-suspend:
    - shard-apl:          DMESG-WARN [fdo#108566] -> PASS +4

  * igt@gem_eio@unwedge-stress:
    - shard-snb:          FAIL [fdo#109661] -> PASS

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          INCOMPLETE [fdo#104108] / [fdo#107773] -> PASS

  * igt@gem_workarounds@suspend-resume:
    - shard-kbl:          DMESG-WARN [fdo#108566] -> PASS +1

  * igt@kms_busy@extended-modeset-hang-oldfb-render-c:
    - shard-iclb:         INCOMPLETE [fdo#107713] -> PASS
    - shard-apl:          INCOMPLETE [fdo#103927] -> PASS

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-glk:          FAIL [fdo#105363] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt:
    - shard-snb:          SKIP [fdo#109271] -> PASS +2

  * igt@kms_frontbuffer_tracking@fbc-1p-rte:
    - shard-iclb:         FAIL [fdo#103167] / [fdo#110378] -> PASS

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-iclb:         FAIL [fdo#103167] -> PASS +3

  * igt@kms_frontbuffer_tracking@psr-suspend:
    - shard-skl:          INCOMPLETE [fdo#104108] / [fdo#106978] -> PASS

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          FAIL [fdo#108145] -> PASS

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          FAIL [fdo#108145] / [fdo#110403] -> PASS

  * igt@kms_psr@psr2_dpms:
    - shard-iclb:         SKIP [fdo#109441] -> PASS +2

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-kbl:          DMESG-FAIL [fdo#105763] -> PASS

  * igt@perf_pmu@rc6:
    - shard-kbl:          SKIP [fdo#109271] -> PASS

  
#### Warnings ####

  * igt@i915_pm_rpm@modeset-non-lpsp:
    - shard-skl:          INCOMPLETE [fdo#107807] -> SKIP [fdo#109271]

  * igt@i915_pm_rpm@modeset-pc8-residency-stress:
    - shard-skl:          SKIP [fdo#109271] -> INCOMPLETE [fdo#107807] +1

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
  [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108228]: https://bugs.freedesktop.org/show_bug.cgi?id=108228
  [fdo#108303]: https://bugs.freedesktop.org/show_bug.cgi?id=108303
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109290]: https://bugs.freedesktop.org/show_bug.cgi?id=109290
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109293]: https://bugs.freedesktop.org/show_bug.cgi?id=109293
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
  [fdo#110042]: https://bugs.freedesktop.org/show_bug.cgi?id=110042
  [fdo#110281]: https://bugs.freedesktop.org/show_bug.cgi?id=110281
  [fdo#110378]: https://bugs.freedesktop.org/show_bug.cgi?id=110378
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 9)
------------------------------

  Missing    (1): shard-hsw 


Build changes
-------------

  * Linux: CI_DRM_5953 -> Patchwork_12834

  CI_DRM_5953: 7ab8969b77f4f10172e3836b6d5c1d917f7e4007 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4957: a765aa108105804c19096554447ad0cb71f64fc3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12834: a7a8a8552578ec852ffa5e7eaebe80ef55e1a701 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12834/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx