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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
	david@gibson.dropbear.id.au, rth@twiddle.net, gkurz@kaod.org
Subject: [Qemu-devel] [PATCH 12/14] target/ppc: decode target register in VSX_EXTRACT_INSERT at translation time
Date: Sun, 28 Apr 2019 15:38:43 +0100	[thread overview]
Message-ID: <20190428143845.11810-13-mark.cave-ayland@ilande.co.uk> (raw)
In-Reply-To: <20190428143845.11810-1-mark.cave-ayland@ilande.co.uk>

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
 target/ppc/helper.h                 |  4 ++--
 target/ppc/int_helper.c             | 12 ++++--------
 target/ppc/translate/vsx-impl.inc.c | 10 +++++-----
 3 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 5f844cc968..81630a5f23 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -546,8 +546,8 @@ DEF_HELPER_4(xvrspip, void, env, i32, vsr, vsr)
 DEF_HELPER_4(xvrspiz, void, env, i32, vsr, vsr)
 DEF_HELPER_5(xxperm, void, env, i32, vsr, vsr, vsr)
 DEF_HELPER_5(xxpermr, void, env, i32, vsr, vsr, vsr)
-DEF_HELPER_4(xxextractuw, void, env, tl, tl, i32)
-DEF_HELPER_4(xxinsertw, void, env, tl, tl, i32)
+DEF_HELPER_4(xxextractuw, void, env, vsr, vsr, i32)
+DEF_HELPER_4(xxinsertw, void, env, vsr, vsr, i32)
 DEF_HELPER_4(xvxsigsp, void, env, i32, vsr, vsr)
 
 DEF_HELPER_2(efscfsi, i32, env, i32)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index f616fb249d..10e7ee5943 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -1901,11 +1901,9 @@ VEXTRACT(uw, u32)
 VEXTRACT(d, u64)
 #undef VEXTRACT
 
-void helper_xxextractuw(CPUPPCState *env, target_ulong xtn,
-                        target_ulong xbn, uint32_t index)
+void helper_xxextractuw(CPUPPCState *env, ppc_vsr_t *xt,
+                        ppc_vsr_t *xb, uint32_t index)
 {
-    ppc_vsr_t *xt = &env->vsr[xtn];
-    ppc_vsr_t *xb = &env->vsr[xbn];
     size_t es = sizeof(uint32_t);
     uint32_t ext_index;
     int i;
@@ -1918,11 +1916,9 @@ void helper_xxextractuw(CPUPPCState *env, target_ulong xtn,
     }
 }
 
-void helper_xxinsertw(CPUPPCState *env, target_ulong xtn,
-                      target_ulong xbn, uint32_t index)
+void helper_xxinsertw(CPUPPCState *env, ppc_vsr_t *xt,
+                      ppc_vsr_t *xb, uint32_t index)
 {
-    ppc_vsr_t *xt = &env->vsr[xtn];
-    ppc_vsr_t *xb = &env->vsr[xbn];
     size_t es = sizeof(uint32_t);
     int ins_index, i = 0;
 
diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c
index 7c79ec22dd..b8f24b7462 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -1569,7 +1569,7 @@ static void gen_xxsldwi(DisasContext *ctx)
 #define VSX_EXTRACT_INSERT(name)                                \
 static void gen_##name(DisasContext *ctx)                       \
 {                                                               \
-    TCGv xt, xb;                                                \
+    TCGv_ptr xt, xb;                                            \
     TCGv_i32 t0;                                                \
     TCGv_i64 t1;                                                \
     uint8_t uimm = UIMM4(ctx->opcode);                          \
@@ -1578,8 +1578,8 @@ static void gen_##name(DisasContext *ctx)                       \
         gen_exception(ctx, POWERPC_EXCP_VSXU);                  \
         return;                                                 \
     }                                                           \
-    xt = tcg_const_tl(xT(ctx->opcode));                         \
-    xb = tcg_const_tl(xB(ctx->opcode));                         \
+    xt = gen_vsr_ptr(xT(ctx->opcode));                          \
+    xb = gen_vsr_ptr(xB(ctx->opcode));                          \
     t0 = tcg_temp_new_i32();                                    \
     t1 = tcg_temp_new_i64();                                    \
     /*                                                          \
@@ -1594,8 +1594,8 @@ static void gen_##name(DisasContext *ctx)                       \
     }                                                           \
     tcg_gen_movi_i32(t0, uimm);                                 \
     gen_helper_##name(cpu_env, xt, xb, t0);                     \
-    tcg_temp_free(xb);                                          \
-    tcg_temp_free(xt);                                          \
+    tcg_temp_free_ptr(xb);                                      \
+    tcg_temp_free_ptr(xt);                                      \
     tcg_temp_free_i32(t0);                                      \
     tcg_temp_free_i64(t1);                                      \
 }
-- 
2.11.0

  parent reply	other threads:[~2019-04-28 15:04 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-28 14:38 [Qemu-devel] [PATCH 00/14] target/ppc: remove getVSR()/putVSR() and further tidy-up Mark Cave-Ayland
2019-04-28 14:38 ` [Qemu-devel] [PATCH 01/14] target/ppc: remove getVSR()/putVSR() from fpu_helper.c Mark Cave-Ayland
2019-04-30 16:25   ` Richard Henderson
2019-05-05  9:27     ` Mark Cave-Ayland
2019-05-05 14:31       ` Richard Henderson
2019-05-05 15:46         ` Mark Cave-Ayland
2019-04-28 14:38 ` [Qemu-devel] [PATCH 02/14] target/ppc: remove getVSR()/putVSR() from mem_helper.c Mark Cave-Ayland
2019-04-30 16:29   ` Richard Henderson
2019-05-05  9:34     ` Mark Cave-Ayland
2019-05-05 14:34       ` Richard Henderson
2019-05-05 15:49         ` Mark Cave-Ayland
2019-05-05 15:58           ` Richard Henderson
2019-04-28 14:38 ` [Qemu-devel] [PATCH 03/14] target/ppc: remove getVSR()/putVSR() from int_helper.c Mark Cave-Ayland
2019-04-30 16:32   ` Richard Henderson
2019-05-05  9:36     ` Mark Cave-Ayland
2019-04-28 14:38 ` [Qemu-devel] [PATCH 04/14] target/ppc: introduce GEN_VSX_HELPER_X3 macro to fpu_helper.c Mark Cave-Ayland
2019-04-30 16:36   ` Richard Henderson
2019-05-05  9:52     ` Mark Cave-Ayland
2019-05-05 14:49       ` Richard Henderson
2019-04-28 14:38 ` [Qemu-devel] [PATCH 05/14] target/ppc: introduce GEN_VSX_HELPER_X2 " Mark Cave-Ayland
2019-04-30 16:38   ` Richard Henderson
2019-05-05  9:57     ` Mark Cave-Ayland
2019-05-05 15:03       ` Richard Henderson
2019-04-28 14:38 ` [Qemu-devel] [PATCH 06/14] target/ppc: introduce GEN_VSX_HELPER_X2_AB " Mark Cave-Ayland
2019-04-30 16:41   ` Richard Henderson
2019-05-05 10:03     ` Mark Cave-Ayland
2019-04-28 14:38 ` [Qemu-devel] [PATCH 07/14] target/ppc: introduce GEN_VSX_HELPER_X1 " Mark Cave-Ayland
2019-04-30 16:43   ` Richard Henderson
2019-05-05 10:06     ` Mark Cave-Ayland
2019-04-28 14:38 ` [Qemu-devel] [PATCH 08/14] target/ppc: introduce GEN_VSX_HELPER_R3 " Mark Cave-Ayland
2019-04-30 16:47   ` Richard Henderson
2019-05-05 10:07     ` Mark Cave-Ayland
2019-04-28 14:38 ` [Qemu-devel] [PATCH 09/14] target/ppc: introduce GEN_VSX_HELPER_R2 " Mark Cave-Ayland
2019-04-30 16:51   ` Richard Henderson
2019-04-28 14:38 ` [Qemu-devel] [PATCH 10/14] target/ppc: introduce GEN_VSX_HELPER_R2_AB " Mark Cave-Ayland
2019-04-30 16:52   ` Richard Henderson
2019-04-28 14:38 ` [Qemu-devel] [PATCH 11/14] target/ppc: decode target register in VSX_VECTOR_LOAD_STORE_LENGTH at translation time Mark Cave-Ayland
2019-04-30 16:53   ` Richard Henderson
2019-04-28 14:38 ` Mark Cave-Ayland [this message]
2019-04-30 16:53   ` [Qemu-devel] [PATCH 12/14] target/ppc: decode target register in VSX_EXTRACT_INSERT " Richard Henderson
2019-04-28 14:38 ` [Qemu-devel] [PATCH 13/14] target/ppc: improve VSX_TEST_DC with new generator macros Mark Cave-Ayland
2019-04-30 16:55   ` Richard Henderson
2019-04-28 14:38 ` [Qemu-devel] [PATCH 14/14] target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro Mark Cave-Ayland
2019-04-30 17:00   ` Richard Henderson
2019-05-05 10:20     ` Mark Cave-Ayland
2019-05-05 15:17       ` Richard Henderson
2019-05-05 15:54         ` Mark Cave-Ayland

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