From: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
To: Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Cc: "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"David S. Miller" <davem@davemloft.net>,
Florian Fainelli <f.fainelli@gmail.com>,
Rasmus Villemoes <Rasmus.Villemoes@prevas.se>
Subject: [RFC PATCH 2/5] net: dsa: mv88e6xxx: rename smi read/write functions
Date: Wed, 1 May 2019 19:32:11 +0000 [thread overview]
Message-ID: <20190501193126.19196-3-rasmus.villemoes@prevas.dk> (raw)
In-Reply-To: <20190501193126.19196-1-rasmus.villemoes@prevas.dk>
With the previous patch adding support for two chips using direct SMI
addressing, the smi_single_chip_{read,write} functions are slightly
misnamed. Changing to smi_dual_chip_{read,write} would not be accurate
either.
Change the names to reflect how the access to the SMI registers is
done (direct/indirect) rather than the number of chips that can be
connected to the same SMI master. No functional change.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
---
drivers/net/dsa/mv88e6xxx/chip.c | 42 ++++++++++++++++----------------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index f66daa77774b..d8d8230a6bf5 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -86,8 +86,8 @@ static int mv88e6xxx_smi_write(struct mv88e6xxx_chip *chip,
return chip->smi_ops->write(chip, addr, reg, val);
}
-static int mv88e6xxx_smi_single_chip_read(struct mv88e6xxx_chip *chip,
- int addr, int reg, u16 *val)
+static int mv88e6xxx_smi_direct_read(struct mv88e6xxx_chip *chip,
+ int addr, int reg, u16 *val)
{
int ret;
@@ -100,8 +100,8 @@ static int mv88e6xxx_smi_single_chip_read(struct mv88e6xxx_chip *chip,
return 0;
}
-static int mv88e6xxx_smi_single_chip_write(struct mv88e6xxx_chip *chip,
- int addr, int reg, u16 val)
+static int mv88e6xxx_smi_direct_write(struct mv88e6xxx_chip *chip,
+ int addr, int reg, u16 val)
{
int ret;
@@ -112,12 +112,12 @@ static int mv88e6xxx_smi_single_chip_write(struct mv88e6xxx_chip *chip,
return 0;
}
-static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_single_chip_ops = {
- .read = mv88e6xxx_smi_single_chip_read,
- .write = mv88e6xxx_smi_single_chip_write,
+static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_direct_ops = {
+ .read = mv88e6xxx_smi_direct_read,
+ .write = mv88e6xxx_smi_direct_write,
};
-static int mv88e6xxx_smi_multi_chip_wait(struct mv88e6xxx_chip *chip)
+static int mv88e6xxx_smi_indirect_wait(struct mv88e6xxx_chip *chip)
{
int ret;
int i;
@@ -134,13 +134,13 @@ static int mv88e6xxx_smi_multi_chip_wait(struct mv88e6xxx_chip *chip)
return -ETIMEDOUT;
}
-static int mv88e6xxx_smi_multi_chip_read(struct mv88e6xxx_chip *chip,
- int addr, int reg, u16 *val)
+static int mv88e6xxx_smi_indirect_read(struct mv88e6xxx_chip *chip,
+ int addr, int reg, u16 *val)
{
int ret;
/* Wait for the bus to become free. */
- ret = mv88e6xxx_smi_multi_chip_wait(chip);
+ ret = mv88e6xxx_smi_indirect_wait(chip);
if (ret < 0)
return ret;
@@ -151,7 +151,7 @@ static int mv88e6xxx_smi_multi_chip_read(struct mv88e6xxx_chip *chip,
return ret;
/* Wait for the read command to complete. */
- ret = mv88e6xxx_smi_multi_chip_wait(chip);
+ ret = mv88e6xxx_smi_indirect_wait(chip);
if (ret < 0)
return ret;
@@ -165,13 +165,13 @@ static int mv88e6xxx_smi_multi_chip_read(struct mv88e6xxx_chip *chip,
return 0;
}
-static int mv88e6xxx_smi_multi_chip_write(struct mv88e6xxx_chip *chip,
- int addr, int reg, u16 val)
+static int mv88e6xxx_smi_indirect_write(struct mv88e6xxx_chip *chip,
+ int addr, int reg, u16 val)
{
int ret;
/* Wait for the bus to become free. */
- ret = mv88e6xxx_smi_multi_chip_wait(chip);
+ ret = mv88e6xxx_smi_indirect_wait(chip);
if (ret < 0)
return ret;
@@ -187,16 +187,16 @@ static int mv88e6xxx_smi_multi_chip_write(struct mv88e6xxx_chip *chip,
return ret;
/* Wait for the write command to complete. */
- ret = mv88e6xxx_smi_multi_chip_wait(chip);
+ ret = mv88e6xxx_smi_indirect_wait(chip);
if (ret < 0)
return ret;
return 0;
}
-static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_multi_chip_ops = {
- .read = mv88e6xxx_smi_multi_chip_read,
- .write = mv88e6xxx_smi_multi_chip_write,
+static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_indirect_ops = {
+ .read = mv88e6xxx_smi_indirect_read,
+ .write = mv88e6xxx_smi_indirect_write,
};
int mv88e6xxx_read(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val)
@@ -4553,9 +4553,9 @@ static int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip,
struct mii_bus *bus, int sw_addr)
{
if (sw_addr == 0 || chip->info->dual_chip)
- chip->smi_ops = &mv88e6xxx_smi_single_chip_ops;
+ chip->smi_ops = &mv88e6xxx_smi_direct_ops;
else if (chip->info->multi_chip)
- chip->smi_ops = &mv88e6xxx_smi_multi_chip_ops;
+ chip->smi_ops = &mv88e6xxx_smi_indirect_ops;
else
return -EINVAL;
--
2.20.1
next prev parent reply other threads:[~2019-05-01 19:32 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-01 19:32 [RFC PATCH 0/5] net: dsa: POC support for mv88e6250 Rasmus Villemoes
2019-05-01 19:32 ` [RFC PATCH 1/5] net: dsa: mv88e6xxx: introduce support for two chips using direct smi addressing Rasmus Villemoes
2019-05-01 20:19 ` Andrew Lunn
2019-05-08 7:57 ` Rasmus Villemoes
2019-05-08 11:47 ` Andrew Lunn
2019-05-08 13:41 ` Vivien Didelot
2019-05-01 19:32 ` Rasmus Villemoes [this message]
2019-05-03 21:57 ` [RFC PATCH 2/5] net: dsa: mv88e6xxx: rename smi read/write functions Vivien Didelot
2019-05-06 5:57 ` Rasmus Villemoes
2019-05-06 14:51 ` Vivien Didelot
2019-05-01 19:32 ` [RFC PATCH 3/5] net: dsa: prepare mv88e6xxx_g1_atu_op() for the mv88e6250 Rasmus Villemoes
2019-05-01 20:22 ` Andrew Lunn
2019-05-01 19:32 ` [RFC PATCH 4/5] net: dsa: implement vtu_getnext and vtu_loadpurge for mv88e6250 Rasmus Villemoes
2019-05-01 20:25 ` Andrew Lunn
2019-05-01 19:32 ` [RFC PATCH 5/5] net: dsa: add support " Rasmus Villemoes
2019-05-01 20:29 ` Andrew Lunn
2019-05-24 9:00 ` [PATCH v2 0/5] net: dsa: " Rasmus Villemoes
2019-05-24 9:00 ` [PATCH v2 1/5] net: dsa: mv88e6xxx: introduce support for two chips using direct smi addressing Rasmus Villemoes
2019-05-24 14:13 ` Andrew Lunn
2019-05-24 17:54 ` Vivien Didelot
2019-05-24 9:00 ` [PATCH v2 2/5] net: dsa: prepare mv88e6xxx_g1_atu_op() for the mv88e6250 Rasmus Villemoes
2019-05-24 17:57 ` Vivien Didelot
2019-05-24 9:00 ` [PATCH v2 3/5] net: dsa: implement vtu_getnext and vtu_loadpurge for mv88e6250 Rasmus Villemoes
2019-05-24 18:02 ` Vivien Didelot
2019-05-24 9:00 ` [PATCH v2 4/5] net: dsa: mv88e6xxx: implement watchdog_ops " Rasmus Villemoes
2019-05-24 14:20 ` Andrew Lunn
2019-05-24 18:05 ` Vivien Didelot
2019-05-24 9:00 ` [PATCH v2 5/5] net: dsa: add support " Rasmus Villemoes
2019-05-24 14:27 ` Andrew Lunn
2019-06-03 8:52 ` Rasmus Villemoes
2019-06-03 12:45 ` Andrew Lunn
2019-05-24 18:11 ` Vivien Didelot
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