* [v3 1/4] drm/i915: Fix the pipe state timing mismatch warnings
@ 2019-05-02 6:34 Vandita Kulkarni
2019-05-02 6:34 ` [v3 2/4] drm/i915: Refactor bdw_get_pipemisc_bpp Vandita Kulkarni
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Vandita Kulkarni @ 2019-05-02 6:34 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, ville.syrjala
Adjust the get transcoder timings for mipi dsi as per the
set timing calculations.
v2: Use the existing intel_get_pipe_timings and do the dsi
specific adjustments in the encoder get_config hook.(Ville, Jani)
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
drivers/gpu/drm/i915/icl_dsi.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index c6ecc00..45fe69c 100644
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -1194,6 +1194,34 @@ static void gen11_dsi_disable(struct intel_encoder *encoder,
gen11_dsi_disable_io_power(encoder);
}
+static void gen11_dsi_get_timings(struct intel_encoder *encoder,
+ struct intel_crtc_state *pipe_config)
+{
+ struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+ struct drm_display_mode *adjusted_mode =
+ &pipe_config->base.adjusted_mode;
+
+ if (intel_dsi->dual_link) {
+ adjusted_mode->crtc_hdisplay *= 2;
+ if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK)
+ adjusted_mode->crtc_hdisplay -=
+ intel_dsi->pixel_overlap;
+ adjusted_mode->crtc_htotal *= 2;
+ }
+ adjusted_mode->crtc_hblank_start = adjusted_mode->crtc_hdisplay;
+ adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_htotal;
+
+ if (intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE) {
+ if (intel_dsi->dual_link) {
+ adjusted_mode->crtc_hsync_start *= 2;
+ adjusted_mode->crtc_hsync_end *= 2;
+ }
+ }
+ adjusted_mode->crtc_vblank_start = adjusted_mode->crtc_vdisplay;
+ adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vtotal;
+
+}
+
static void gen11_dsi_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
@@ -1204,6 +1232,7 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
pipe_config->port_clock =
cnl_calc_wrpll_link(dev_priv, &pipe_config->dpll_hw_state);
pipe_config->base.adjusted_mode.crtc_clock = intel_dsi->pclk;
+ gen11_dsi_get_timings(encoder, pipe_config);
pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);
}
--
1.9.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [v3 2/4] drm/i915: Refactor bdw_get_pipemisc_bpp
2019-05-02 6:34 [v3 1/4] drm/i915: Fix the pipe state timing mismatch warnings Vandita Kulkarni
@ 2019-05-02 6:34 ` Vandita Kulkarni
2019-05-02 6:34 ` [v3 3/4] drm/i915: Fix pipe config mismatch for bpp, output format Vandita Kulkarni
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Vandita Kulkarni @ 2019-05-02 6:34 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, ville.syrjala
Move bdw_get_pipemisc_bpp alongside bdw_set_pipemisc
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 22 ++++++++++++++++++++++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/vlv_dsi.c | 22 ----------------------
3 files changed, 23 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index dd65d7c..2e5867d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8936,6 +8936,28 @@ static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state)
I915_WRITE(PIPEMISC(crtc->pipe), val);
}
+int bdw_get_pipemisc_bpp(struct intel_crtc *crtc)
+{
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ u32 tmp;
+
+ tmp = I915_READ(PIPEMISC(crtc->pipe));
+
+ switch (tmp & PIPEMISC_DITHER_BPC_MASK) {
+ case PIPEMISC_DITHER_6_BPC:
+ return 18;
+ case PIPEMISC_DITHER_8_BPC:
+ return 24;
+ case PIPEMISC_DITHER_10_BPC:
+ return 30;
+ case PIPEMISC_DITHER_12_BPC:
+ return 36;
+ default:
+ MISSING_CASE(tmp);
+ return 0;
+ }
+}
+
int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp)
{
/*
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 57ae396..ba75842 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1759,6 +1759,7 @@ u32 skl_plane_stride(const struct intel_plane_state *plane_state,
unsigned int i9xx_plane_max_stride(struct intel_plane *plane,
u32 pixel_format, u64 modifier,
unsigned int rotation);
+int bdw_get_pipemisc_bpp(struct intel_crtc *crtc);
/* intel_runtime_pm.c */
static inline void
diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
index bc5b782..895ea1a 100644
--- a/drivers/gpu/drm/i915/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/vlv_dsi.c
@@ -262,28 +262,6 @@ static void band_gap_reset(struct drm_i915_private *dev_priv)
vlv_flisdsi_put(dev_priv);
}
-static int bdw_get_pipemisc_bpp(struct intel_crtc *crtc)
-{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 tmp;
-
- tmp = I915_READ(PIPEMISC(crtc->pipe));
-
- switch (tmp & PIPEMISC_DITHER_BPC_MASK) {
- case PIPEMISC_DITHER_6_BPC:
- return 18;
- case PIPEMISC_DITHER_8_BPC:
- return 24;
- case PIPEMISC_DITHER_10_BPC:
- return 30;
- case PIPEMISC_DITHER_12_BPC:
- return 36;
- default:
- MISSING_CASE(tmp);
- return 0;
- }
-}
-
static int intel_dsi_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [v3 3/4] drm/i915: Fix pipe config mismatch for bpp, output format
2019-05-02 6:34 [v3 1/4] drm/i915: Fix the pipe state timing mismatch warnings Vandita Kulkarni
2019-05-02 6:34 ` [v3 2/4] drm/i915: Refactor bdw_get_pipemisc_bpp Vandita Kulkarni
@ 2019-05-02 6:34 ` Vandita Kulkarni
2019-05-02 6:34 ` [v3 4/4] drm/i915: Fix pixel clock and crtc clock config mismatch Vandita Kulkarni
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Vandita Kulkarni @ 2019-05-02 6:34 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, ville.syrjala
Read back the pixel fomrat register and get the bpp.
v2: Read the PIPE_MISC register (Jani).
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
drivers/gpu/drm/i915/icl_dsi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index 45fe69c..cd6a4f3 100644
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -1226,6 +1226,7 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
/* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */
@@ -1234,6 +1235,7 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
pipe_config->base.adjusted_mode.crtc_clock = intel_dsi->pclk;
gen11_dsi_get_timings(encoder, pipe_config);
pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);
+ pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc);
}
static int gen11_dsi_compute_config(struct intel_encoder *encoder,
@@ -1249,6 +1251,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
struct drm_display_mode *adjusted_mode =
&pipe_config->base.adjusted_mode;
+ pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
intel_fixed_panel_mode(fixed_mode, adjusted_mode);
intel_pch_panel_fitting(crtc, pipe_config, conn_state->scaling_mode);
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [v3 4/4] drm/i915: Fix pixel clock and crtc clock config mismatch
2019-05-02 6:34 [v3 1/4] drm/i915: Fix the pipe state timing mismatch warnings Vandita Kulkarni
2019-05-02 6:34 ` [v3 2/4] drm/i915: Refactor bdw_get_pipemisc_bpp Vandita Kulkarni
2019-05-02 6:34 ` [v3 3/4] drm/i915: Fix pipe config mismatch for bpp, output format Vandita Kulkarni
@ 2019-05-02 6:34 ` Vandita Kulkarni
2019-05-02 7:18 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/4] drm/i915: Fix the pipe state timing mismatch warnings Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Vandita Kulkarni @ 2019-05-02 6:34 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, ville.syrjala
In case of dual link mode, the mode clock that we get
from the VBT is halved.
v2: Simplify the calculation (Jani).
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
drivers/gpu/drm/i915/icl_dsi.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index cd6a4f3..46b3d30 100644
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -1232,7 +1232,11 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
/* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */
pipe_config->port_clock =
cnl_calc_wrpll_link(dev_priv, &pipe_config->dpll_hw_state);
+
pipe_config->base.adjusted_mode.crtc_clock = intel_dsi->pclk;
+ if (intel_dsi->dual_link)
+ pipe_config->base.adjusted_mode.crtc_clock *= 2;
+
gen11_dsi_get_timings(encoder, pipe_config);
pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);
pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc);
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/4] drm/i915: Fix the pipe state timing mismatch warnings
2019-05-02 6:34 [v3 1/4] drm/i915: Fix the pipe state timing mismatch warnings Vandita Kulkarni
` (2 preceding siblings ...)
2019-05-02 6:34 ` [v3 4/4] drm/i915: Fix pixel clock and crtc clock config mismatch Vandita Kulkarni
@ 2019-05-02 7:18 ` Patchwork
2019-05-02 7:35 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-02 13:21 ` ✓ Fi.CI.IGT: " Patchwork
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2019-05-02 7:18 UTC (permalink / raw)
To: Vandita Kulkarni; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/4] drm/i915: Fix the pipe state timing mismatch warnings
URL : https://patchwork.freedesktop.org/series/60186/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4f4166d5345c drm/i915: Fix the pipe state timing mismatch warnings
-:48: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#48: FILE: drivers/gpu/drm/i915/icl_dsi.c:1223:
+
+}
total: 0 errors, 0 warnings, 1 checks, 41 lines checked
acb46e6ef365 drm/i915: Refactor bdw_get_pipemisc_bpp
387ba833429c drm/i915: Fix pipe config mismatch for bpp, output format
2538e2d41f5e drm/i915: Fix pixel clock and crtc clock config mismatch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [v3,1/4] drm/i915: Fix the pipe state timing mismatch warnings
2019-05-02 6:34 [v3 1/4] drm/i915: Fix the pipe state timing mismatch warnings Vandita Kulkarni
` (3 preceding siblings ...)
2019-05-02 7:18 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/4] drm/i915: Fix the pipe state timing mismatch warnings Patchwork
@ 2019-05-02 7:35 ` Patchwork
2019-05-02 13:21 ` ✓ Fi.CI.IGT: " Patchwork
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2019-05-02 7:35 UTC (permalink / raw)
To: Vandita Kulkarni; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/4] drm/i915: Fix the pipe state timing mismatch warnings
URL : https://patchwork.freedesktop.org/series/60186/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6025 -> Patchwork_12933
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/60186/revisions/1/mbox/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_12933:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_suspend@basic-s4-devices:
- {fi-icl-dsi}: NOTRUN -> [DMESG-WARN][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/fi-icl-dsi/igt@gem_exec_suspend@basic-s4-devices.html
* igt@runner@aborted:
- {fi-icl-dsi}: [FAIL][2] ([fdo#109593]) -> [FAIL][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/fi-icl-dsi/igt@runner@aborted.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/fi-icl-dsi/igt@runner@aborted.html
Known issues
------------
Here are the changes found in Patchwork_12933 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [PASS][4] -> [INCOMPLETE][5] ([fdo#107718])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
* igt@i915_selftest@live_contexts:
- fi-skl-gvtdvm: [PASS][6] -> [DMESG-FAIL][7] ([fdo#110235])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
#### Possible fixes ####
* igt@gem_ctx_create@basic-files:
- fi-icl-y: [INCOMPLETE][8] ([fdo#107713] / [fdo#109100]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/fi-icl-y/igt@gem_ctx_create@basic-files.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/fi-icl-y/igt@gem_ctx_create@basic-files.html
* igt@i915_selftest@live_hangcheck:
- fi-bsw-kefka: [INCOMPLETE][10] ([fdo#105876]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/fi-bsw-kefka/igt@i915_selftest@live_hangcheck.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/fi-bsw-kefka/igt@i915_selftest@live_hangcheck.html
#### Warnings ####
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-kbl-guc: [INCOMPLETE][12] ([fdo#107807]) -> [SKIP][13] ([fdo#109271])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#105876]: https://bugs.freedesktop.org/show_bug.cgi?id=105876
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109593]: https://bugs.freedesktop.org/show_bug.cgi?id=109593
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (50 -> 45)
------------------------------
Additional (2): fi-icl-u2 fi-apl-guc
Missing (7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper
Build changes
-------------
* Linux: CI_DRM_6025 -> Patchwork_12933
CI_DRM_6025: 60fc981bcf66e011011756e167e47cc4d4bebc10 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4971: fc5e0467eb6913d21ad932aa8a31c77fdb5a9c77 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12933: 2538e2d41f5e7870919958d5fc050743f8ea39d4 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2538e2d41f5e drm/i915: Fix pixel clock and crtc clock config mismatch
387ba833429c drm/i915: Fix pipe config mismatch for bpp, output format
acb46e6ef365 drm/i915: Refactor bdw_get_pipemisc_bpp
4f4166d5345c drm/i915: Fix the pipe state timing mismatch warnings
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [v3,1/4] drm/i915: Fix the pipe state timing mismatch warnings
2019-05-02 6:34 [v3 1/4] drm/i915: Fix the pipe state timing mismatch warnings Vandita Kulkarni
` (4 preceding siblings ...)
2019-05-02 7:35 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-05-02 13:21 ` Patchwork
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2019-05-02 13:21 UTC (permalink / raw)
To: Vandita Kulkarni; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/4] drm/i915: Fix the pipe state timing mismatch warnings
URL : https://patchwork.freedesktop.org/series/60186/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6025_full -> Patchwork_12933_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_12933_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@system-suspend-modeset:
- shard-iclb: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#108840] / [fdo#110581])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-iclb2/igt@i915_pm_rpm@system-suspend-modeset.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-iclb4/igt@i915_pm_rpm@system-suspend-modeset.html
* igt@i915_suspend@debugfs-reader:
- shard-apl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566]) +7 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-apl1/igt@i915_suspend@debugfs-reader.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-apl3/igt@i915_suspend@debugfs-reader.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render:
- shard-iclb: [PASS][5] -> [FAIL][6] ([fdo#103167]) +6 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render:
- shard-iclb: [PASS][7] -> [INCOMPLETE][8] ([fdo#106978] / [fdo#107713] / [fdo#110581])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render.html
* igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
- shard-glk: [PASS][9] -> [SKIP][10] ([fdo#109271])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-glk9/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-glk5/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#109441]) +3 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-iclb6/igt@kms_psr@psr2_cursor_plane_onoff.html
* igt@kms_rotation_crc@multiplane-rotation:
- shard-kbl: [PASS][13] -> [FAIL][14] ([fdo#109016])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-kbl3/igt@kms_rotation_crc@multiplane-rotation.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-kbl5/igt@kms_rotation_crc@multiplane-rotation.html
* igt@kms_setmode@basic:
- shard-kbl: [PASS][15] -> [FAIL][16] ([fdo#99912])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-kbl2/igt@kms_setmode@basic.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-kbl7/igt@kms_setmode@basic.html
#### Possible fixes ####
* igt@gem_ctx_switch@basic-all-light:
- shard-apl: [INCOMPLETE][17] ([fdo#103927] / [fdo#110581]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-apl3/igt@gem_ctx_switch@basic-all-light.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-apl7/igt@gem_ctx_switch@basic-all-light.html
* igt@kms_cursor_crc@cursor-128x128-suspend:
- shard-apl: [DMESG-WARN][19] ([fdo#108566]) -> [PASS][20] +2 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-apl3/igt@kms_cursor_crc@cursor-128x128-suspend.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-apl4/igt@kms_cursor_crc@cursor-128x128-suspend.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-snb: [SKIP][21] ([fdo#109271]) -> [PASS][22] +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-snb4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-snb5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-iclb: [INCOMPLETE][23] ([fdo#107713] / [fdo#110581]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-iclb8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-iclb2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-kbl: [DMESG-WARN][25] ([fdo#103313]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
- shard-iclb: [FAIL][27] ([fdo#103167]) -> [PASS][28] +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
- shard-iclb: [INCOMPLETE][29] ([fdo#107713] / [fdo#110036 ] / [fdo#110581]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-iclb3/igt@kms_plane@pixel-format-pipe-a-planes-source-clamping.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-iclb8/igt@kms_plane@pixel-format-pipe-a-planes-source-clamping.html
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-glk: [SKIP][31] ([fdo#109271]) -> [PASS][32] +2 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-glk2/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-glk9/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [FAIL][33] ([fdo#103166]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-iclb7/igt@kms_plane_lowres@pipe-a-tiling-x.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format:
- shard-glk: [SKIP][35] ([fdo#109271] / [fdo#109278]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-glk2/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-glk9/igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format.html
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: [SKIP][37] ([fdo#109441]) -> [PASS][38] +4 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-iclb5/igt@kms_psr@psr2_cursor_render.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][39] ([fdo#99912]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6025/shard-apl8/igt@kms_setmode@basic.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/shard-apl6/igt@kms_setmode@basic.html
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110036 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110036
[fdo#110581]: https://bugs.freedesktop.org/show_bug.cgi?id=110581
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (9 -> 7)
------------------------------
Missing (2): pig-skl-6260u shard-skl
Build changes
-------------
* Linux: CI_DRM_6025 -> Patchwork_12933
CI_DRM_6025: 60fc981bcf66e011011756e167e47cc4d4bebc10 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4971: fc5e0467eb6913d21ad932aa8a31c77fdb5a9c77 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12933: 2538e2d41f5e7870919958d5fc050743f8ea39d4 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12933/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-05-02 13:21 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-02 6:34 [v3 1/4] drm/i915: Fix the pipe state timing mismatch warnings Vandita Kulkarni
2019-05-02 6:34 ` [v3 2/4] drm/i915: Refactor bdw_get_pipemisc_bpp Vandita Kulkarni
2019-05-02 6:34 ` [v3 3/4] drm/i915: Fix pipe config mismatch for bpp, output format Vandita Kulkarni
2019-05-02 6:34 ` [v3 4/4] drm/i915: Fix pixel clock and crtc clock config mismatch Vandita Kulkarni
2019-05-02 7:18 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/4] drm/i915: Fix the pipe state timing mismatch warnings Patchwork
2019-05-02 7:35 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-02 13:21 ` ✓ Fi.CI.IGT: " Patchwork
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