From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:39037) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hMCQy-0000dW-8P for qemu-devel@nongnu.org; Thu, 02 May 2019 10:11:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hMCQx-0007Rd-6l for qemu-devel@nongnu.org; Thu, 02 May 2019 10:11:36 -0400 From: David Hildenbrand Date: Thu, 2 May 2019 16:10:10 +0200 Message-Id: <20190502141019.6385-32-david@redhat.com> In-Reply-To: <20190502141019.6385-1-david@redhat.com> References: <20190502141019.6385-1-david@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v3 31/40] s390x/tcg: Implement VECTOR SHIFT RIGHT ARITHMETIC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Thomas Huth , Cornelia Huck , Richard Henderson , David Hildenbrand , Richard Henderson Similar to VECTOR SHIFT LEFT ARITHMETIC. Add s390_vec_sar() similar to s390_vec_shr(). Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/helper.h | 1 + target/s390x/insn-data.def | 4 ++++ target/s390x/translate_vx.inc.c | 17 +++++++++++++++++ target/s390x/vec_int_helper.c | 26 ++++++++++++++++++++++++++ 4 files changed, 48 insertions(+) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index b4ddc8a722..fda274d325 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -205,6 +205,7 @@ DEF_HELPER_FLAGS_4(gvec_verll16, TCG_CALL_NO_RWG, voi= d, ptr, cptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_verim8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, = i32) DEF_HELPER_FLAGS_4(gvec_verim16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr,= i32) DEF_HELPER_FLAGS_4(gvec_vsl, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_vsra, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32= ) =20 #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 76aec5a21f..587de3eaac 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1166,6 +1166,10 @@ F(0xe775, VSLB, VRR_c, V, 0, 0, 0, 0, vsl, 0, IF_VEC) /* VECTOR SHIFT LEFT DOUBLE BY BYTE */ F(0xe777, VSLDB, VRI_d, V, 0, 0, 0, 0, vsldb, 0, IF_VEC) +/* VECTOR SHIFT RIGHT ARITHMETIC */ + F(0xe77e, VSRA, VRR_c, V, 0, 0, 0, 0, vsra, 0, IF_VEC) +/* VECTOR SHIFT RIGHT ARITHMETIC BY BYTE */ + F(0xe77f, VSRAB, VRR_c, V, 0, 0, 0, 0, vsra, 0, IF_VEC) =20 #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.= inc.c index fd9c5a46e0..a54682987a 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -2085,3 +2085,20 @@ static DisasJumpType op_vsldb(DisasContext *s, Dis= asOps *o) tcg_temp_free(t2); return DISAS_NEXT; } + +static DisasJumpType op_vsra(DisasContext *s, DisasOps *o) +{ + TCGv_i64 shift =3D tcg_temp_new_i64(); + + read_vec_element_i64(shift, get_field(s->fields, v3), 7, ES_8); + if (s->fields->op2 =3D=3D 0x7e) { + tcg_gen_andi_i64(shift, shift, 0x7); + } else { + tcg_gen_andi_i64(shift, shift, 0x78); + } + + gen_gvec_2i_ool(get_field(s->fields, v1), get_field(s->fields, v2), + shift, 0, gen_helper_gvec_vsra); + tcg_temp_free_i64(shift); + return DISAS_NEXT; +} diff --git a/target/s390x/vec_int_helper.c b/target/s390x/vec_int_helper.= c index 3df069f033..67e9f2b0ed 100644 --- a/target/s390x/vec_int_helper.c +++ b/target/s390x/vec_int_helper.c @@ -49,6 +49,26 @@ static void s390_vec_shl(S390Vector *d, const S390Vect= or *a, uint64_t count) } } =20 +static void s390_vec_sar(S390Vector *d, const S390Vector *a, uint64_t co= unt) +{ + uint64_t tmp; + + if (count =3D=3D 0) { + d->doubleword[0] =3D a->doubleword[0]; + d->doubleword[1] =3D a->doubleword[1]; + } else if (count =3D=3D 64) { + d->doubleword[1] =3D a->doubleword[0]; + d->doubleword[0] =3D 0; + } else if (count < 64) { + tmp =3D a->doubleword[1] >> count; + d->doubleword[1] =3D deposit64(tmp, 64 - count, count, a->double= word[0]); + d->doubleword[0] =3D (int64_t)a->doubleword[0] >> count; + } else { + d->doubleword[1] =3D (int64_t)a->doubleword[0] >> (count - 64); + d->doubleword[0] =3D 0; + } +} + static void s390_vec_shr(S390Vector *d, const S390Vector *a, uint64_t co= unt) { uint64_t tmp; @@ -535,3 +555,9 @@ void HELPER(gvec_vsl)(void *v1, const void *v2, uint6= 4_t count, { s390_vec_shl(v1, v2, count); } + +void HELPER(gvec_vsra)(void *v1, const void *v2, uint64_t count, + uint32_t desc) +{ + s390_vec_sar(v1, v2, count); +} --=20 2.20.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03784C43219 for ; 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Thu, 02 May 2019 10:11:36 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51174) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hMCQw-0007R7-VX; Thu, 02 May 2019 10:11:35 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3C1EB307E042; Thu, 2 May 2019 14:11:34 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-88.ams2.redhat.com [10.36.117.88]) by smtp.corp.redhat.com (Postfix) with ESMTP id AF5E117D58; Thu, 2 May 2019 14:11:32 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Thu, 2 May 2019 16:10:10 +0200 Message-Id: <20190502141019.6385-32-david@redhat.com> In-Reply-To: <20190502141019.6385-1-david@redhat.com> References: <20190502141019.6385-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Thu, 02 May 2019 14:11:34 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 31/40] s390x/tcg: Implement VECTOR SHIFT RIGHT ARITHMETIC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , David Hildenbrand , Cornelia Huck , Richard Henderson , qemu-s390x@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="UTF-8" Message-ID: <20190502141010.XGMLzs8r4OE2Hng_O6KDA1Z7Qa6MBFivv-6aTeaKxQY@z> Similar to VECTOR SHIFT LEFT ARITHMETIC. Add s390_vec_sar() similar to s390_vec_shr(). Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/helper.h | 1 + target/s390x/insn-data.def | 4 ++++ target/s390x/translate_vx.inc.c | 17 +++++++++++++++++ target/s390x/vec_int_helper.c | 26 ++++++++++++++++++++++++++ 4 files changed, 48 insertions(+) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index b4ddc8a722..fda274d325 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -205,6 +205,7 @@ DEF_HELPER_FLAGS_4(gvec_verll16, TCG_CALL_NO_RWG, voi= d, ptr, cptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_verim8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, = i32) DEF_HELPER_FLAGS_4(gvec_verim16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr,= i32) DEF_HELPER_FLAGS_4(gvec_vsl, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_vsra, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32= ) =20 #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 76aec5a21f..587de3eaac 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1166,6 +1166,10 @@ F(0xe775, VSLB, VRR_c, V, 0, 0, 0, 0, vsl, 0, IF_VEC) /* VECTOR SHIFT LEFT DOUBLE BY BYTE */ F(0xe777, VSLDB, VRI_d, V, 0, 0, 0, 0, vsldb, 0, IF_VEC) +/* VECTOR SHIFT RIGHT ARITHMETIC */ + F(0xe77e, VSRA, VRR_c, V, 0, 0, 0, 0, vsra, 0, IF_VEC) +/* VECTOR SHIFT RIGHT ARITHMETIC BY BYTE */ + F(0xe77f, VSRAB, VRR_c, V, 0, 0, 0, 0, vsra, 0, IF_VEC) =20 #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.= inc.c index fd9c5a46e0..a54682987a 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -2085,3 +2085,20 @@ static DisasJumpType op_vsldb(DisasContext *s, Dis= asOps *o) tcg_temp_free(t2); return DISAS_NEXT; } + +static DisasJumpType op_vsra(DisasContext *s, DisasOps *o) +{ + TCGv_i64 shift =3D tcg_temp_new_i64(); + + read_vec_element_i64(shift, get_field(s->fields, v3), 7, ES_8); + if (s->fields->op2 =3D=3D 0x7e) { + tcg_gen_andi_i64(shift, shift, 0x7); + } else { + tcg_gen_andi_i64(shift, shift, 0x78); + } + + gen_gvec_2i_ool(get_field(s->fields, v1), get_field(s->fields, v2), + shift, 0, gen_helper_gvec_vsra); + tcg_temp_free_i64(shift); + return DISAS_NEXT; +} diff --git a/target/s390x/vec_int_helper.c b/target/s390x/vec_int_helper.= c index 3df069f033..67e9f2b0ed 100644 --- a/target/s390x/vec_int_helper.c +++ b/target/s390x/vec_int_helper.c @@ -49,6 +49,26 @@ static void s390_vec_shl(S390Vector *d, const S390Vect= or *a, uint64_t count) } } =20 +static void s390_vec_sar(S390Vector *d, const S390Vector *a, uint64_t co= unt) +{ + uint64_t tmp; + + if (count =3D=3D 0) { + d->doubleword[0] =3D a->doubleword[0]; + d->doubleword[1] =3D a->doubleword[1]; + } else if (count =3D=3D 64) { + d->doubleword[1] =3D a->doubleword[0]; + d->doubleword[0] =3D 0; + } else if (count < 64) { + tmp =3D a->doubleword[1] >> count; + d->doubleword[1] =3D deposit64(tmp, 64 - count, count, a->double= word[0]); + d->doubleword[0] =3D (int64_t)a->doubleword[0] >> count; + } else { + d->doubleword[1] =3D (int64_t)a->doubleword[0] >> (count - 64); + d->doubleword[0] =3D 0; + } +} + static void s390_vec_shr(S390Vector *d, const S390Vector *a, uint64_t co= unt) { uint64_t tmp; @@ -535,3 +555,9 @@ void HELPER(gvec_vsl)(void *v1, const void *v2, uint6= 4_t count, { s390_vec_shl(v1, v2, count); } + +void HELPER(gvec_vsra)(void *v1, const void *v2, uint64_t count, + uint32_t desc) +{ + s390_vec_sar(v1, v2, count); +} --=20 2.20.1