* [kvm-unit-tests PATCH] x86: Unmask LVTPC on interrupt
@ 2019-05-02 17:41 nadav.amit
2019-05-20 14:12 ` Paolo Bonzini
0 siblings, 1 reply; 2+ messages in thread
From: nadav.amit @ 2019-05-02 17:41 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: kvm, Nadav Amit
From: Nadav Amit <nadav.amit@gmail.com>
According to the SDM: "When a performance monitoring counters interrupt
is generated, the mask bit for its associated LVT entry is set."
Unmask LVTPC on each interrupt by reprogramming it. As the old value is
known, no need for read-modify-write is needed.
Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
---
x86/pmu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/x86/pmu.c b/x86/pmu.c
index f7b3010..6658fe9 100644
--- a/x86/pmu.c
+++ b/x86/pmu.c
@@ -184,6 +184,7 @@ static void start_event(pmu_counter_t *evt)
wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, ctrl);
}
global_enable(evt);
+ apic_write(APIC_LVTPC, PC_VECTOR);
}
static void stop_event(pmu_counter_t *evt)
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [kvm-unit-tests PATCH] x86: Unmask LVTPC on interrupt
2019-05-02 17:41 [kvm-unit-tests PATCH] x86: Unmask LVTPC on interrupt nadav.amit
@ 2019-05-20 14:12 ` Paolo Bonzini
0 siblings, 0 replies; 2+ messages in thread
From: Paolo Bonzini @ 2019-05-20 14:12 UTC (permalink / raw)
To: nadav.amit; +Cc: kvm
On 02/05/19 19:41, nadav.amit@gmail.com wrote:
> From: Nadav Amit <nadav.amit@gmail.com>
>
> According to the SDM: "When a performance monitoring counters interrupt
> is generated, the mask bit for its associated LVT entry is set."
>
> Unmask LVTPC on each interrupt by reprogramming it. As the old value is
> known, no need for read-modify-write is needed.
>
> Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
> ---
> x86/pmu.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/x86/pmu.c b/x86/pmu.c
> index f7b3010..6658fe9 100644
> --- a/x86/pmu.c
> +++ b/x86/pmu.c
> @@ -184,6 +184,7 @@ static void start_event(pmu_counter_t *evt)
> wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, ctrl);
> }
> global_enable(evt);
> + apic_write(APIC_LVTPC, PC_VECTOR);
> }
>
> static void stop_event(pmu_counter_t *evt)
>
Queued, thanks.
Paolo
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2019-05-02 17:41 [kvm-unit-tests PATCH] x86: Unmask LVTPC on interrupt nadav.amit
2019-05-20 14:12 ` Paolo Bonzini
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