From: Alexander Shishkin <alexander.shishkin@linux.intel.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-kernel@vger.kernel.org,
Alexander Shishkin <alexander.shishkin@linux.intel.com>
Subject: [GIT PULL 05/22] intel_th: Add "rtit" source device
Date: Fri, 3 May 2019 11:44:38 +0300 [thread overview]
Message-ID: <20190503084455.23436-6-alexander.shishkin@linux.intel.com> (raw)
In-Reply-To: <20190503084455.23436-1-alexander.shishkin@linux.intel.com>
In some versions of Intel TH, the Software Trace Hub (STH) has a second
MMIO BAR dedicated to the input from Intel PT. This calls for a new
subdevice that will be enumerated if the corresponding BAR is present.
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
---
drivers/hwtracing/intel_th/core.c | 18 ++++++++++++++++++
drivers/hwtracing/intel_th/intel_th.h | 1 +
drivers/hwtracing/intel_th/pci.c | 11 ++++++++---
3 files changed, 27 insertions(+), 3 deletions(-)
diff --git a/drivers/hwtracing/intel_th/core.c b/drivers/hwtracing/intel_th/core.c
index 8c221e1ed12d..a0b8b0182daa 100644
--- a/drivers/hwtracing/intel_th/core.c
+++ b/drivers/hwtracing/intel_th/core.c
@@ -500,6 +500,24 @@ static const struct intel_th_subdevice {
.name = "sth",
.type = INTEL_TH_SOURCE,
},
+ {
+ .nres = 2,
+ .res = {
+ {
+ .start = REG_STH_OFFSET,
+ .end = REG_STH_OFFSET + REG_STH_LENGTH - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = TH_MMIO_RTIT,
+ .end = 0,
+ .flags = IORESOURCE_MEM,
+ },
+ },
+ .id = -1,
+ .name = "rtit",
+ .type = INTEL_TH_SOURCE,
+ },
{
.nres = 1,
.res = {
diff --git a/drivers/hwtracing/intel_th/intel_th.h b/drivers/hwtracing/intel_th/intel_th.h
index 8c90c8d01867..3fca86d78fdd 100644
--- a/drivers/hwtracing/intel_th/intel_th.h
+++ b/drivers/hwtracing/intel_th/intel_th.h
@@ -228,6 +228,7 @@ int intel_th_output_enable(struct intel_th *th, unsigned int otype);
enum th_mmio_idx {
TH_MMIO_CONFIG = 0,
TH_MMIO_SW = 1,
+ TH_MMIO_RTIT = 2,
TH_MMIO_END,
};
diff --git a/drivers/hwtracing/intel_th/pci.c b/drivers/hwtracing/intel_th/pci.c
index 9dd2d75bd539..fd8267bbaf2c 100644
--- a/drivers/hwtracing/intel_th/pci.c
+++ b/drivers/hwtracing/intel_th/pci.c
@@ -20,6 +20,7 @@
enum {
TH_PCI_CONFIG_BAR = 0,
TH_PCI_STH_SW_BAR = 2,
+ TH_PCI_RTIT_BAR = 4,
};
#define BAR_MASK (BIT(TH_PCI_CONFIG_BAR) | BIT(TH_PCI_STH_SW_BAR))
@@ -75,8 +76,8 @@ static int intel_th_pci_probe(struct pci_dev *pdev,
[TH_MMIO_CONFIG] = pdev->resource[TH_PCI_CONFIG_BAR],
[TH_MMIO_SW] = pdev->resource[TH_PCI_STH_SW_BAR],
};
+ int err, r = TH_MMIO_SW + 1;
struct intel_th *th;
- int err;
err = pcim_enable_device(pdev);
if (err)
@@ -86,8 +87,12 @@ static int intel_th_pci_probe(struct pci_dev *pdev,
if (err)
return err;
- th = intel_th_alloc(&pdev->dev, drvdata, resource, TH_MMIO_END,
- pdev->irq);
+ if (pdev->resource[TH_PCI_RTIT_BAR].start) {
+ resource[TH_MMIO_RTIT] = pdev->resource[TH_PCI_RTIT_BAR];
+ r++;
+ }
+
+ th = intel_th_alloc(&pdev->dev, drvdata, resource, r, pdev->irq);
if (IS_ERR(th))
return PTR_ERR(th);
--
2.20.1
next prev parent reply other threads:[~2019-05-03 8:45 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-03 8:44 [GIT PULL 00/22] intel_th: Updates for v5.2 Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 01/22] intel_th: msu: Fix single mode with IOMMU Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 02/22] intel_th: SPDX-ify the documentation Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 03/22] intel_th: Rework resource passing between glue layers and core Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 04/22] intel_th: Skip subdevices if their MMIO is missing Alexander Shishkin
2019-05-03 8:44 ` Alexander Shishkin [this message]
2019-05-03 8:44 ` [GIT PULL 06/22] intel_th: Communicate IRQ via resource Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 07/22] intel_th: pci: Use MSI interrupt signalling Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 08/22] intel_th: msu: Start handling IRQs Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 09/22] intel_th: Only report useful IRQs to subdevices Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 10/22] intel_th: msu: Replace open-coded list_{first,last,next}_entry variants Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 11/22] intel_th: msu: Switch over to scatterlist Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 12/22] intel_th: msu: Support multipage blocks Alexander Shishkin
2019-05-03 16:15 ` Greg Kroah-Hartman
2019-05-03 8:44 ` [GIT PULL 13/22] intel_th: msu: Factor out pipeline draining Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 14/22] intel_th: gth: Factor out trace start/stop Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 15/22] intel_th: Add switch triggering support Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 16/22] intel_th: msu: Correct the block wrap detection Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 17/22] intel_th: msu: Add a sysfs attribute to trigger window switch Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 18/22] intel_th: msu: Add current window tracking Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 19/22] intel_th: msu: Introduce buffer driver interface Alexander Shishkin
2019-05-03 16:19 ` Greg Kroah-Hartman
2019-05-03 8:44 ` [GIT PULL 20/22] intel_th: msu: Add a sysfs attribute showing possible modes Alexander Shishkin
2019-05-03 16:13 ` Greg Kroah-Hartman
2019-05-03 8:44 ` [GIT PULL 21/22] intel_th: msu-sink: An example msu buffer driver Alexander Shishkin
2019-05-03 8:44 ` [GIT PULL 22/22] intel_th: msu: Preserve pre-existing buffer configuration Alexander Shishkin
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