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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 09/10] drm/i915: Avoid taking the PPS lock for non-eDP/VLV/CHV
Date: Mon, 6 May 2019 16:12:50 +0300	[thread overview]
Message-ID: <20190506131250.GZ24299@intel.com> (raw)
In-Reply-To: <20190506123552.GX24299@intel.com>

On Mon, May 06, 2019 at 03:35:52PM +0300, Ville Syrjälä wrote:
> On Fri, May 03, 2019 at 02:26:47AM +0300, Imre Deak wrote:
> > On ICL we have to make sure that we enable the AUX power domain in a
> > controlled way (corresponding to the port's actual TypeC mode). Since
> > the PPS lock - which takes an AUX power ref - is only needed on
> > eDP/VLV/CHV avoid taking it in other cases.
> > 
> > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dp.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index f56cbda59fb3..1ee9b7ebd801 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -6263,6 +6263,10 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
> >  
> >  	intel_dp->reset_link_params = true;
> >  
> > +	if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) &&
> > +	    !intel_dp_is_edp(intel_dp))
> > +		return;
> 
> vlv/chv need this for all DP ports.

Which is what this does. The wording in the commit message confused me.

> 
> > +
> >  	with_pps_lock(intel_dp, wakeref) {
> >  		if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> >  			intel_dp->active_pipe = vlv_active_pipe(intel_dp);
> > -- 
> > 2.17.1
> 
> -- 
> Ville Syrjälä
> Intel

-- 
Ville Syrjälä
Intel
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  reply	other threads:[~2019-05-06 13:12 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-02 23:26 [PATCH 00/10] drm/i915: Add support for asynchronous display power disabling Imre Deak
2019-05-02 23:26 ` [PATCH 01/10] drm/i915: Add support for tracking wakerefs w/o power-on guarantee Imre Deak
2019-05-07 14:03   ` Chris Wilson
2019-05-02 23:26 ` [PATCH 02/10] drm/i915: Verify power domains state during suspend in all cases Imre Deak
2019-05-02 23:26 ` [PATCH 03/10] drm/i915: Add support for asynchronous display power disabling Imre Deak
2019-05-03 12:16   ` Chris Wilson
2019-05-03 13:42     ` Imre Deak
2019-05-06 11:12   ` [PATCH v2 " Imre Deak
2019-05-02 23:26 ` [PATCH 04/10] drm/i915: Disable power asynchronously during DP AUX transfers Imre Deak
2019-05-02 23:26 ` [PATCH 05/10] drm/i915: WARN for eDP encoders in intel_dp_detect_dpcd() Imre Deak
2019-05-02 23:26 ` [PATCH 06/10] drm/i915: Remove the unneeded AUX power ref from intel_dp_detect() Imre Deak
2019-05-02 23:26 ` [PATCH 07/10] drm/i915: Remove the unneeded AUX power ref from intel_dp_hpd_pulse() Imre Deak
2019-05-02 23:26 ` [PATCH 08/10] drm/i915: Replace use of PLLS power domain with DISPLAY_CORE domain Imre Deak
2019-05-02 23:26 ` [PATCH 09/10] drm/i915: Avoid taking the PPS lock for non-eDP/VLV/CHV Imre Deak
2019-05-06 12:35   ` Ville Syrjälä
2019-05-06 13:12     ` Ville Syrjälä [this message]
2019-05-06 13:15       ` Imre Deak
2019-05-02 23:26 ` [PATCH 10/10] drm/i915: Assert that TypeC ports are not used for eDP Imre Deak
2019-05-03  0:34 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for asynchronous display power disabling Patchwork
2019-05-03  0:38 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-05-03  1:12 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-03  7:50 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-05-03 10:07   ` Imre Deak
2019-05-03 12:37     ` Chris Wilson
2019-05-03 13:52       ` Imre Deak
2019-05-03 14:21         ` Imre Deak
2019-05-06  9:44         ` Imre Deak
2019-05-06 11:29 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for asynchronous display power disabling (rev2) Patchwork
2019-05-06 11:49 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-06 12:57 ` ✓ Fi.CI.IGT: " Patchwork

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