From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10C57C04A6B for ; Fri, 10 May 2019 06:53:45 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C0E8A2175B for ; Fri, 10 May 2019 06:53:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b="hOyKcd/w" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C0E8A2175B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([127.0.0.1]:37901 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hOzPc-0005Ru-0K for qemu-devel@archiver.kernel.org; Fri, 10 May 2019 02:53:44 -0400 Received: from eggs.gnu.org ([209.51.188.92]:45606) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hOzNz-0004GR-P7 for qemu-devel@nongnu.org; Fri, 10 May 2019 02:52:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hOzNx-0005at-GP for qemu-devel@nongnu.org; Fri, 10 May 2019 02:52:03 -0400 Received: from bilbo.ozlabs.org ([2401:3900:2:1::2]:57417 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hOzNw-0005a8-Lv; Fri, 10 May 2019 02:52:01 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 450gqY5gwhz9sML; Fri, 10 May 2019 16:51:53 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1557471113; bh=Sj/Wgu7WH49CkUWhEjPA/k4EKBiT8Cam/zUR9wJ0yUI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=hOyKcd/wMR256/Lzol9MsI878pxcT+4shVLz8K9ISfjrobzxGe+xhvos4BwbZ2Qwr 9pbCpGJAT1Y4RyyMk/5SX00ed+HDp+VBgPK/JTR0JRL+kFJswiYnenAf1QxiZcqZ2i vP0wHtxfH8xsmYw9xr3+PQFqZ2pknvcdSRXhUb98= Date: Fri, 10 May 2019 16:46:21 +1000 From: David Gibson To: Aravinda Prasad Message-ID: <20190510064620.GL20559@umbus.fritz.box> References: <155591636364.20338.844048953355207313.stgit@aravinda> <155591661564.20338.10693276428550708820.stgit@aravinda> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="HLsZ5Z1opAQvdr2J" Content-Disposition: inline In-Reply-To: <155591661564.20338.10693276428550708820.stgit@aravinda> User-Agent: Mutt/1.11.4 (2019-03-13) X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: Re: [Qemu-devel] [PATCH v8 5/6] ppc: spapr: Enable FWNMI capability X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, qemu-ppc@nongnu.org, aik@au1.ibm.com, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --HLsZ5Z1opAQvdr2J Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Apr 22, 2019 at 12:33:35PM +0530, Aravinda Prasad wrote: > Enable the KVM capability KVM_CAP_PPC_FWNMI so that > the KVM causes guest exit with NMI as exit reason > when it encounters a machine check exception on the > address belonging to a guest. Without this capability > enabled, KVM redirects machine check exceptions to > guest's 0x200 vector. >=20 > This patch also deals with the case when a guest with > the KVM_CAP_PPC_FWNMI capability enabled is attempted > to migrate to a host that does not support this > capability. >=20 > Signed-off-by: Aravinda Prasad > --- > hw/ppc/spapr.c | 1 + > hw/ppc/spapr_caps.c | 26 ++++++++++++++++++++++++++ > hw/ppc/spapr_rtas.c | 14 ++++++++++++++ > include/hw/ppc/spapr.h | 4 +++- > target/ppc/kvm.c | 14 ++++++++++++++ > target/ppc/kvm_ppc.h | 6 ++++++ > 6 files changed, 64 insertions(+), 1 deletion(-) >=20 > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c > index ffd1715..44e09bb 100644 > --- a/hw/ppc/spapr.c > +++ b/hw/ppc/spapr.c > @@ -4372,6 +4372,7 @@ static void spapr_machine_class_init(ObjectClass *o= c, void *data) > smc->default_caps.caps[SPAPR_CAP_NESTED_KVM_HV] =3D SPAPR_CAP_OFF; > smc->default_caps.caps[SPAPR_CAP_LARGE_DECREMENTER] =3D SPAPR_CAP_ON; > smc->default_caps.caps[SPAPR_CAP_CCF_ASSIST] =3D SPAPR_CAP_OFF; > + smc->default_caps.caps[SPAPR_CAP_FWNMI_MCE] =3D SPAPR_CAP_OFF; > spapr_caps_add_properties(smc, &error_abort); > smc->irq =3D &spapr_irq_xics; > smc->dr_phb_enabled =3D true; > diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c > index edc5ed0..5b3af04 100644 > --- a/hw/ppc/spapr_caps.c > +++ b/hw/ppc/spapr_caps.c > @@ -473,6 +473,22 @@ static void cap_ccf_assist_apply(SpaprMachineState *= spapr, uint8_t val, > } > } > =20 > +static void cap_fwnmi_mce_apply(SpaprMachineState *spapr, uint8_t val, > + Error **errp) > +{ > + PowerPCCPU *cpu =3D POWERPC_CPU(first_cpu); > + > + if (!val) { > + return; /* Disabled by default */ > + } > + > + if (kvm_enabled()) { > + if (kvmppc_fwnmi_enable(cpu)) { > + error_setg(errp, "Requested fwnmi capability not support by = KVM"); > + } > + } > +} > + > SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] =3D { > [SPAPR_CAP_HTM] =3D { > .name =3D "htm", > @@ -571,6 +587,15 @@ SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] = =3D { > .type =3D "bool", > .apply =3D cap_ccf_assist_apply, > }, > + [SPAPR_CAP_FWNMI_MCE] =3D { > + .name =3D "fwnmi-mce", > + .description =3D "Handle fwnmi machine check exceptions", > + .index =3D SPAPR_CAP_FWNMI_MCE, > + .get =3D spapr_cap_get_bool, > + .set =3D spapr_cap_set_bool, > + .type =3D "bool", > + .apply =3D cap_fwnmi_mce_apply, > + }, > }; > =20 > static SpaprCapabilities default_caps_with_cpu(SpaprMachineState *spapr, > @@ -706,6 +731,7 @@ SPAPR_CAP_MIG_STATE(ibs, SPAPR_CAP_IBS); > SPAPR_CAP_MIG_STATE(nested_kvm_hv, SPAPR_CAP_NESTED_KVM_HV); > SPAPR_CAP_MIG_STATE(large_decr, SPAPR_CAP_LARGE_DECREMENTER); > SPAPR_CAP_MIG_STATE(ccf_assist, SPAPR_CAP_CCF_ASSIST); > +SPAPR_CAP_MIG_STATE(fwnmi, SPAPR_CAP_FWNMI_MCE); > =20 > void spapr_caps_init(SpaprMachineState *spapr) > { > diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c > index d3499f9..997cf19 100644 > --- a/hw/ppc/spapr_rtas.c > +++ b/hw/ppc/spapr_rtas.c > @@ -49,6 +49,7 @@ > #include "hw/ppc/fdt.h" > #include "target/ppc/mmu-hash64.h" > #include "target/ppc/mmu-book3s-v3.h" > +#include "kvm_ppc.h" > =20 > static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *s= papr, > uint32_t token, uint32_t nargs, > @@ -354,6 +355,7 @@ static void rtas_ibm_nmi_register(PowerPCCPU *cpu, > target_ulong args, > uint32_t nret, target_ulong rets) > { > + int ret; > uint64_t rtas_addr =3D spapr_get_rtas_addr(); > =20 > if (!rtas_addr) { > @@ -361,6 +363,18 @@ static void rtas_ibm_nmi_register(PowerPCCPU *cpu, > return; > } > =20 > + ret =3D kvmppc_fwnmi_enable(cpu); You shouldn't need this here as well as in cap_fwnmi_mce_apply(). Instead, you should unconditionally fail the nmi-register if the capability is not enabled. > + if (ret =3D=3D 1) { > + rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); > + return; > + } > + > + if (ret < 0) { > + rtas_st(rets, 0, RTAS_OUT_HW_ERROR); > + return; > + } > + > spapr->guest_machine_check_addr =3D rtas_ld(args, 1); > rtas_st(rets, 0, RTAS_OUT_SUCCESS); > } > diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h > index 03f34bf..9d16ad1 100644 > --- a/include/hw/ppc/spapr.h > +++ b/include/hw/ppc/spapr.h > @@ -78,8 +78,10 @@ typedef enum { > #define SPAPR_CAP_LARGE_DECREMENTER 0x08 > /* Count Cache Flush Assist HW Instruction */ > #define SPAPR_CAP_CCF_ASSIST 0x09 > +/* FWNMI machine check handling */ > +#define SPAPR_CAP_FWNMI_MCE 0x0A > /* Num Caps */ > -#define SPAPR_CAP_NUM (SPAPR_CAP_CCF_ASSIST + 1) > +#define SPAPR_CAP_NUM (SPAPR_CAP_FWNMI_MCE + 1) > =20 > /* > * Capability Values > diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c > index 5eedce8..9c7b71d 100644 > --- a/target/ppc/kvm.c > +++ b/target/ppc/kvm.c > @@ -83,6 +83,7 @@ static int cap_ppc_safe_indirect_branch; > static int cap_ppc_count_cache_flush_assist; > static int cap_ppc_nested_kvm_hv; > static int cap_large_decr; > +static int cap_ppc_fwnmi; > =20 > static uint32_t debug_inst_opcode; > =20 > @@ -150,6 +151,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) > kvmppc_get_cpu_characteristics(s); > cap_ppc_nested_kvm_hv =3D kvm_vm_check_extension(s, KVM_CAP_PPC_NEST= ED_HV); > cap_large_decr =3D kvmppc_get_dec_bits(); > + cap_ppc_fwnmi =3D kvm_check_extension(s, KVM_CAP_PPC_FWNMI); > /* > * Note: setting it to false because there is not such capability > * in KVM at this moment. > @@ -2117,6 +2119,18 @@ void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mp= ic_proxy) > } > } > =20 > +int kvmppc_fwnmi_enable(PowerPCCPU *cpu) > +{ > + CPUState *cs =3D CPU(cpu); > + > + if (!cap_ppc_fwnmi) { > + return 1; > + } > + > + return kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_FWNMI, 0); > +} > + > + > int kvmppc_smt_threads(void) > { > return cap_ppc_smt ? cap_ppc_smt : 1; > diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h > index 6edc42f..28919d3 100644 > --- a/target/ppc/kvm_ppc.h > +++ b/target/ppc/kvm_ppc.h > @@ -27,6 +27,7 @@ void kvmppc_enable_h_page_init(void); > void kvmppc_set_papr(PowerPCCPU *cpu); > int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr); > void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy); > +int kvmppc_fwnmi_enable(PowerPCCPU *cpu); > int kvmppc_smt_threads(void); > void kvmppc_hint_smt_possible(Error **errp); > int kvmppc_set_smt_threads(int smt); > @@ -159,6 +160,11 @@ static inline void kvmppc_set_mpic_proxy(PowerPCCPU = *cpu, int mpic_proxy) > { > } > =20 > +static inline int kvmppc_fwnmi_enable(PowerPCCPU *cpu) > +{ > + return 1; > +} > + > static inline int kvmppc_smt_threads(void) > { > return 1; >=20 --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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