[U-Boot] [PATCH 1/2] sunxi: USB PHY: Support shared PHY 0

[Andre Przywara <andre.przywara@arm.com>]

The Allwinner H3, H5, H6 and A64 SoCs share USB PHY 0 between the first
HCI controller (OHCI0/EHCI0) and the MUSB OTG controller. Bit 0 in
PHY register 0x20 selects with of the controllers is connected to the
PHY. So far we were hardwiring this bit to 0, so that the OTG controller
controls the pins.
As the A64 has only two sets of USB pins, some boards like the Pine64
connect two USB-A sockets to them, to give more host ports. In this case
we would like HCI0 to control the pins. For those boards we typically
don't even enable the MUSB OTG controller in the config.

Depending on whether the OTG controller is configured or not, switch
PHY0 to either EHCI0/OHCI0 or the OTG controller.

This enables the upper USB port on the Pine64 (and other) boards. This
proves to be very useful when people want to connect both an USB
keyboard and a flash drive, for instance to install a Linux
distribution.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 drivers/phy/allwinner/phy-sun4i-usb.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
index f206fa3f5d..de1065fce6 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -240,6 +240,11 @@ static int sun4i_usb_phy_power_off(struct phy *phy)
 	return 0;
 }
 
+#ifdef CONFIG_USB_MUSB_SUNXI
+#define REROUTE_TARGET	true
+#else
+#define REROUTE_TARGET	false
+#endif
 static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, bool id_det)
 {
 	u32 regval;
@@ -304,7 +309,8 @@ static int sun4i_usb_phy_init(struct phy *phy)
 
 	sun4i_usb_phy_passby(phy, true);
 
-	sun4i_usb_phy0_reroute(data, true);
+	if (data->cfg->phy0_dual_route)
+		sun4i_usb_phy0_reroute(data, REROUTE_TARGET);
 
 	return 0;
 }
-- 
2.14.5