From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB104C04AAF for ; Mon, 20 May 2019 09:07:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 87B3E20656 for ; Mon, 20 May 2019 09:07:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="r3DLdZVq" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731866AbfETJHh (ORCPT ); Mon, 20 May 2019 05:07:37 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:45041 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725764AbfETJHf (ORCPT ); Mon, 20 May 2019 05:07:35 -0400 Received: by mail-pg1-f193.google.com with SMTP id z16so6473669pgv.11 for ; Mon, 20 May 2019 02:07:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7Z3x6LljX02dT+qUsi4m5KdJMqoZuShmgkReRd7s7dw=; b=r3DLdZVquXFLKd1da1eZpPdtprimWp+1P0POwfA5UUeoTkxSobEqBi1KGSCQYbFCm3 2+XKlnETBnwFFt9LnbcyDPsWdhFiM1Gnmfc1RbgzFKham3n2VLaUJGTIbIybd814Kq++ Ei4GbfHHGH0cok44ayQvfwfcBprRzfTPJvGiE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7Z3x6LljX02dT+qUsi4m5KdJMqoZuShmgkReRd7s7dw=; b=Kvu2sHrNg7Lu/wg0Nlif8rQnYMmglb/T3bCmy6cJfN4sHoBtDhMsoYfXPB/I260RA5 hgompeUuuUI0nfTvqvDjDeGjfHTUogc3t6mtmsQF/eSjuSJ52gU9UEjC9n4Xh+4OaotH XJauQUWnpcH0hF6C7Td1bP+nzi8aOzCepGdsEy0h6YLoxeBKMNnuZSvYPI+TABLAFNRG Kn+kG8Jkc9FOSXtxT2MtLOWbKeVzA0MctmK7lrC2th7YxUHwg69jcig5iSteKAlaN0bw +gLAdPfC93gTgbieMvi8AXIgWcouCJBz8Yx1yCsrxpS2ycbqj2PnZWs3F7z+Br93hJBi q8QA== X-Gm-Message-State: APjAAAV0oACQK/uq/LY/s1laXmAHo8/OQMP8J1YKXypAqcZ7Ql0UsdFJ dbrTKUEJ14t2jEwVWBN/S0TZwLLbGW0= X-Google-Smtp-Source: APXvYqzLgYLTjFtQLw4oKcVl1iHzhftrgdySuDkHfC1rKahZhdIXQSYYBQYO4ZaxRqZhqAfjXafQQA== X-Received: by 2002:a62:62c1:: with SMTP id w184mr77662542pfb.95.1558343254514; Mon, 20 May 2019 02:07:34 -0700 (PDT) Received: from localhost.localdomain ([183.82.227.193]) by smtp.gmail.com with ESMTPSA id d15sm51671614pfm.186.2019.05.20.02.07.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 May 2019 02:07:34 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , David Airlie , Daniel Vetter , Chen-Yu Tsai , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: bshah@mykolab.com, Vasily Khoruzhick , powerpan@qq.com, michael@amarulasolutions.com, linux-amarula@amarulasolutions.com, linux-sunxi@googlegroups.com, Jagan Teki Subject: [PATCH v10 04/11] drm/sun4i: tcon: Compute DCLK dividers based on format, lanes Date: Mon, 20 May 2019 14:33:11 +0530 Message-Id: <20190520090318.27570-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190520090318.27570-1-jagan@amarulasolutions.com> References: <20190520090318.27570-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org pll-video => pll-mipi => tcon0 => tcon0-pixel-clock is the typical MIPI clock topology in Allwinner DSI controller. TCON dotclock driver is computing the desired DCLK divider based on panel pixel clock along with input DCLK min, max divider values from tcon driver and that would eventually set the pll-mipi clock rate. The current code is passing dsi min and max divider value as 4 via tcon driver which would ended-up triggering below vblank wait timed out warning on "bananapi,s070wv20-ct16" panel. WARNING: CPU: 0 PID: 31 at drivers/gpu/drm/drm_atomic_helper.c:1429 drm_atomic_helper_wait_for_vblanks.part.1+0x298/0x2a0 [CRTC:46:crtc-0] vblank wait timed out Modules linked in: CPU: 0 PID: 31 Comm: kworker/0:1 Not tainted 5.1.0-next-20190514-00025-g5186cdf10757-dirty #6 Hardware name: Allwinner sun8i Family Workqueue: events deferred_probe_work_func [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [] (show_stack) from [] (dump_stack+0x84/0x98) [] (dump_stack) from [] (__warn+0xfc/0x114) [] (__warn) from [] (warn_slowpath_fmt+0x44/0x68) [] (warn_slowpath_fmt) from [] (drm_atomic_helper_wait_for_vblanks.part.1+0x298/0x2a0) [] (drm_atomic_helper_wait_for_vblanks.part.1) from [] (drm_atomic_helper_commit_tail_rpm+0x5c/0x6c) [] (drm_atomic_helper_commit_tail_rpm) from [] (commit_tail+0x40/0x6c) [] (commit_tail) from [] (drm_atomic_helper_commit+0xbc/0x128) [] (drm_atomic_helper_commit) from [] (restore_fbdev_mode_atomic+0x1cc/0x1dc) [] (restore_fbdev_mode_atomic) from [] (drm_fb_helper_restore_fbdev_mode_unlocked+0x54/0xa0) [] (drm_fb_helper_restore_fbdev_mode_unlocked) from [] (drm_fb_helper_set_par+0x30/0x54) [] (drm_fb_helper_set_par) from [] (fbcon_init+0x560/0x5ac) [] (fbcon_init) from [] (visual_init+0xbc/0x104) [] (visual_init) from [] (do_bind_con_driver+0x1b0/0x390) [] (do_bind_con_driver) from [] (do_take_over_console+0x13c/0x1c4) [] (do_take_over_console) from [] (do_fbcon_takeover+0x74/0xcc) [] (do_fbcon_takeover) from [] (notifier_call_chain+0x44/0x84) [] (notifier_call_chain) from [] (__blocking_notifier_call_chain+0x48/0x60) [] (__blocking_notifier_call_chain) from [] (blocking_notifier_call_chain+0x18/0x20) [] (blocking_notifier_call_chain) from [] (register_framebuffer+0x1e0/0x2f8) [] (register_framebuffer) from [] (__drm_fb_helper_initial_config_and_unlock+0x2fc/0x50c) [] (__drm_fb_helper_initial_config_and_unlock) from [] (drm_fbdev_client_hotplug+0xe8/0x1b8) [] (drm_fbdev_client_hotplug) from [] (drm_fbdev_generic_setup+0x88/0x118) [] (drm_fbdev_generic_setup) from [] (sun4i_drv_bind+0x128/0x160) [] (sun4i_drv_bind) from [] (try_to_bring_up_master+0x164/0x1a0) [] (try_to_bring_up_master) from [] (__component_add+0x94/0x140) [] (__component_add) from [] (sun6i_dsi_probe+0x144/0x234) [] (sun6i_dsi_probe) from [] (platform_drv_probe+0x48/0x9c) [] (platform_drv_probe) from [] (really_probe+0x1dc/0x2c8) [] (really_probe) from [] (driver_probe_device+0x60/0x160) [] (driver_probe_device) from [] (bus_for_each_drv+0x74/0xb8) [] (bus_for_each_drv) from [] (__device_attach+0xd0/0x13c) [] (__device_attach) from [] (bus_probe_device+0x84/0x8c) [] (bus_probe_device) from [] (deferred_probe_work_func+0x64/0x90) [] (deferred_probe_work_func) from [] (process_one_work+0x204/0x420) [] (process_one_work) from [] (worker_thread+0x274/0x5a0) [] (worker_thread) from [] (kthread+0x11c/0x14c) [] (kthread) from [] (ret_from_fork+0x14/0x2c) Exception stack(0xde539fb0 to 0xde539ff8) 9fa0: 00000000 00000000 00000000 00000000 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 ---[ end trace 4017fea4906ab391 ]--- But accordingly to Allwinner A33, A64 BSP codes [1] [2] this divider is clearly using 'format/lanes' for dsi divider value, dsi_clk.clk_div Which would compute the pll_freq and set a clock rate for it in [3] and [4] respectively. The same issue has reproduced in A33, A64 with 4-lane and 2-lane devices and got fixed with this computation logic 'format/lanes', so this patch using dclk min and max dividers as per BSP. [1] https://github.com/BPI-SINOVOIP/BPI-M2M-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp/de/disp_lcd.c#L1106 [2] https://github.com/BPI-SINOVOIP/BPI-M64-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/disp_al.c#L213 [3] https://github.com/BPI-SINOVOIP/BPI-M2M-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp/de/disp_lcd.c#L1127 [4] https://github.com/BPI-SINOVOIP/BPI-M2M-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp/de/disp_lcd.c#L1161 Tested-by: Merlijn Wajer Signed-off-by: Jagan Teki --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 9d8d8124b1f6..8f93121fead4 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -341,8 +341,8 @@ static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon, u32 block_space, start_delay; u32 tcon_div; - tcon->dclk_min_div = SUN6I_DSI_TCON_DIV; - tcon->dclk_max_div = SUN6I_DSI_TCON_DIV; + tcon->dclk_min_div = bpp/lanes; + tcon->dclk_max_div = bpp/lanes; sun4i_tcon0_mode_set_common(tcon, mode); -- 2.18.0.321.gffc6fa0e3 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7933C04AAF for ; Mon, 20 May 2019 09:08:07 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ACA1920815 for ; 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Mon, 20 May 2019 02:07:34 -0700 (PDT) Received: from localhost.localdomain ([183.82.227.193]) by smtp.gmail.com with ESMTPSA id d15sm51671614pfm.186.2019.05.20.02.07.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 May 2019 02:07:34 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , David Airlie , Daniel Vetter , Chen-Yu Tsai , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 04/11] drm/sun4i: tcon: Compute DCLK dividers based on format, lanes Date: Mon, 20 May 2019 14:33:11 +0530 Message-Id: <20190520090318.27570-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190520090318.27570-1-jagan@amarulasolutions.com> References: <20190520090318.27570-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190520_020735_499594_426C1E8D X-CRM114-Status: GOOD ( 14.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bshah@mykolab.com, powerpan@qq.com, linux-sunxi@googlegroups.com, Jagan Teki , michael@amarulasolutions.com, linux-amarula@amarulasolutions.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org pll-video => pll-mipi => tcon0 => tcon0-pixel-clock is the typical MIPI clock topology in Allwinner DSI controller. TCON dotclock driver is computing the desired DCLK divider based on panel pixel clock along with input DCLK min, max divider values from tcon driver and that would eventually set the pll-mipi clock rate. The current code is passing dsi min and max divider value as 4 via tcon driver which would ended-up triggering below vblank wait timed out warning on "bananapi,s070wv20-ct16" panel. WARNING: CPU: 0 PID: 31 at drivers/gpu/drm/drm_atomic_helper.c:1429 drm_atomic_helper_wait_for_vblanks.part.1+0x298/0x2a0 [CRTC:46:crtc-0] vblank wait timed out Modules linked in: CPU: 0 PID: 31 Comm: kworker/0:1 Not tainted 5.1.0-next-20190514-00025-g5186cdf10757-dirty #6 Hardware name: Allwinner sun8i Family Workqueue: events deferred_probe_work_func [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [] (show_stack) from [] (dump_stack+0x84/0x98) [] (dump_stack) from [] (__warn+0xfc/0x114) [] (__warn) from [] (warn_slowpath_fmt+0x44/0x68) [] (warn_slowpath_fmt) from [] (drm_atomic_helper_wait_for_vblanks.part.1+0x298/0x2a0) [] (drm_atomic_helper_wait_for_vblanks.part.1) from [] (drm_atomic_helper_commit_tail_rpm+0x5c/0x6c) [] (drm_atomic_helper_commit_tail_rpm) from [] (commit_tail+0x40/0x6c) [] (commit_tail) from [] (drm_atomic_helper_commit+0xbc/0x128) [] (drm_atomic_helper_commit) from [] (restore_fbdev_mode_atomic+0x1cc/0x1dc) [] (restore_fbdev_mode_atomic) from [] (drm_fb_helper_restore_fbdev_mode_unlocked+0x54/0xa0) [] (drm_fb_helper_restore_fbdev_mode_unlocked) from [] (drm_fb_helper_set_par+0x30/0x54) [] (drm_fb_helper_set_par) from [] (fbcon_init+0x560/0x5ac) [] (fbcon_init) from [] (visual_init+0xbc/0x104) [] (visual_init) from [] (do_bind_con_driver+0x1b0/0x390) [] (do_bind_con_driver) from [] (do_take_over_console+0x13c/0x1c4) [] (do_take_over_console) from [] (do_fbcon_takeover+0x74/0xcc) [] (do_fbcon_takeover) from [] (notifier_call_chain+0x44/0x84) [] (notifier_call_chain) from [] (__blocking_notifier_call_chain+0x48/0x60) [] (__blocking_notifier_call_chain) from [] (blocking_notifier_call_chain+0x18/0x20) [] (blocking_notifier_call_chain) from [] (register_framebuffer+0x1e0/0x2f8) [] (register_framebuffer) from [] (__drm_fb_helper_initial_config_and_unlock+0x2fc/0x50c) [] (__drm_fb_helper_initial_config_and_unlock) from [] (drm_fbdev_client_hotplug+0xe8/0x1b8) [] (drm_fbdev_client_hotplug) from [] (drm_fbdev_generic_setup+0x88/0x118) [] (drm_fbdev_generic_setup) from [] (sun4i_drv_bind+0x128/0x160) [] (sun4i_drv_bind) from [] (try_to_bring_up_master+0x164/0x1a0) [] (try_to_bring_up_master) from [] (__component_add+0x94/0x140) [] (__component_add) from [] (sun6i_dsi_probe+0x144/0x234) [] (sun6i_dsi_probe) from [] (platform_drv_probe+0x48/0x9c) [] (platform_drv_probe) from [] (really_probe+0x1dc/0x2c8) [] (really_probe) from [] (driver_probe_device+0x60/0x160) [] (driver_probe_device) from [] (bus_for_each_drv+0x74/0xb8) [] (bus_for_each_drv) from [] (__device_attach+0xd0/0x13c) [] (__device_attach) from [] (bus_probe_device+0x84/0x8c) [] (bus_probe_device) from [] (deferred_probe_work_func+0x64/0x90) [] (deferred_probe_work_func) from [] (process_one_work+0x204/0x420) [] (process_one_work) from [] (worker_thread+0x274/0x5a0) [] (worker_thread) from [] (kthread+0x11c/0x14c) [] (kthread) from [] (ret_from_fork+0x14/0x2c) Exception stack(0xde539fb0 to 0xde539ff8) 9fa0: 00000000 00000000 00000000 00000000 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 ---[ end trace 4017fea4906ab391 ]--- But accordingly to Allwinner A33, A64 BSP codes [1] [2] this divider is clearly using 'format/lanes' for dsi divider value, dsi_clk.clk_div Which would compute the pll_freq and set a clock rate for it in [3] and [4] respectively. The same issue has reproduced in A33, A64 with 4-lane and 2-lane devices and got fixed with this computation logic 'format/lanes', so this patch using dclk min and max dividers as per BSP. [1] https://github.com/BPI-SINOVOIP/BPI-M2M-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp/de/disp_lcd.c#L1106 [2] https://github.com/BPI-SINOVOIP/BPI-M64-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/disp_al.c#L213 [3] https://github.com/BPI-SINOVOIP/BPI-M2M-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp/de/disp_lcd.c#L1127 [4] https://github.com/BPI-SINOVOIP/BPI-M2M-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp/de/disp_lcd.c#L1161 Tested-by: Merlijn Wajer Signed-off-by: Jagan Teki --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 9d8d8124b1f6..8f93121fead4 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -341,8 +341,8 @@ static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon, u32 block_space, start_delay; u32 tcon_div; - tcon->dclk_min_div = SUN6I_DSI_TCON_DIV; - tcon->dclk_max_div = SUN6I_DSI_TCON_DIV; + tcon->dclk_min_div = bpp/lanes; + tcon->dclk_max_div = bpp/lanes; sun4i_tcon0_mode_set_common(tcon, mode); -- 2.18.0.321.gffc6fa0e3 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jagan Teki Subject: [PATCH v10 04/11] drm/sun4i: tcon: Compute DCLK dividers based on format, lanes Date: Mon, 20 May 2019 14:33:11 +0530 Message-ID: <20190520090318.27570-5-jagan@amarulasolutions.com> References: <20190520090318.27570-1-jagan@amarulasolutions.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) by gabe.freedesktop.org (Postfix) with ESMTPS id 035FF8930A for ; Mon, 20 May 2019 09:07:35 +0000 (UTC) Received: by mail-pf1-x441.google.com with SMTP id 13so6897773pfw.9 for ; Mon, 20 May 2019 02:07:34 -0700 (PDT) In-Reply-To: <20190520090318.27570-1-jagan@amarulasolutions.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Maxime Ripard , David Airlie , Daniel Vetter , Chen-Yu Tsai , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: bshah@mykolab.com, powerpan@qq.com, Vasily Khoruzhick , linux-sunxi@googlegroups.com, Jagan Teki , michael@amarulasolutions.com, linux-amarula@amarulasolutions.com List-Id: dri-devel@lists.freedesktop.org cGxsLXZpZGVvID0+IHBsbC1taXBpID0+IHRjb24wID0+IHRjb24wLXBpeGVsLWNsb2NrIGlzIHRo ZSB0eXBpY2FsCk1JUEkgY2xvY2sgdG9wb2xvZ3kgaW4gQWxsd2lubmVyIERTSSBjb250cm9sbGVy LgoKVENPTiBkb3RjbG9jayBkcml2ZXIgaXMgY29tcHV0aW5nIHRoZSBkZXNpcmVkIERDTEsgZGl2 aWRlciBiYXNlZCBvbgpwYW5lbCBwaXhlbCBjbG9jayBhbG9uZyB3aXRoIGlucHV0IERDTEsgbWlu LCBtYXggZGl2aWRlciB2YWx1ZXMgZnJvbQp0Y29uIGRyaXZlciBhbmQgdGhhdCB3b3VsZCBldmVu dHVhbGx5IHNldCB0aGUgcGxsLW1pcGkgY2xvY2sgcmF0ZS4KClRoZSBjdXJyZW50IGNvZGUgaXMg cGFzc2luZyBkc2kgbWluIGFuZCBtYXggZGl2aWRlciB2YWx1ZSBhcyA0IHZpYQp0Y29uIGRyaXZl ciB3aGljaCB3b3VsZCBlbmRlZC11cCB0cmlnZ2VyaW5nIGJlbG93IHZibGFuayB3YWl0IHRpbWVk IG91dAp3YXJuaW5nIG9uICJiYW5hbmFwaSxzMDcwd3YyMC1jdDE2IiBwYW5lbC4KCiBXQVJOSU5H OiBDUFU6IDAgUElEOiAzMSBhdCBkcml2ZXJzL2dwdS9kcm0vZHJtX2F0b21pY19oZWxwZXIuYzox NDI5IGRybV9hdG9taWNfaGVscGVyX3dhaXRfZm9yX3ZibGFua3MucGFydC4xKzB4Mjk4LzB4MmEw CiBbQ1JUQzo0NjpjcnRjLTBdIHZibGFuayB3YWl0IHRpbWVkIG91dAogTW9kdWxlcyBsaW5rZWQg aW46CiBDUFU6IDAgUElEOiAzMSBDb21tOiBrd29ya2VyLzA6MSBOb3QgdGFpbnRlZCA1LjEuMC1u ZXh0LTIwMTkwNTE0LTAwMDI1LWc1MTg2Y2RmMTA3NTctZGlydHkgIzYKIEhhcmR3YXJlIG5hbWU6 IEFsbHdpbm5lciBzdW44aSBGYW1pbHkKIFdvcmtxdWV1ZTogZXZlbnRzIGRlZmVycmVkX3Byb2Jl X3dvcmtfZnVuYwogWzxjMDEwZWQ1ND5dICh1bndpbmRfYmFja3RyYWNlKSBmcm9tIFs8YzAxMGI3 NmM+XSAoc2hvd19zdGFjaysweDEwLzB4MTQpCiBbPGMwMTBiNzZjPl0gKHNob3dfc3RhY2spIGZy b20gWzxjMDY4OGM3MD5dIChkdW1wX3N0YWNrKzB4ODQvMHg5OCkKIFs8YzA2ODhjNzA+XSAoZHVt cF9zdGFjaykgZnJvbSBbPGMwMTFkOWU0Pl0gKF9fd2FybisweGZjLzB4MTE0KQogWzxjMDExZDll ND5dIChfX3dhcm4pIGZyb20gWzxjMDExZGE0MD5dICh3YXJuX3Nsb3dwYXRoX2ZtdCsweDQ0LzB4 NjgpCiBbPGMwMTFkYTQwPl0gKHdhcm5fc2xvd3BhdGhfZm10KSBmcm9tIFs8YzA0MGNkNTA+XSAo ZHJtX2F0b21pY19oZWxwZXJfd2FpdF9mb3JfdmJsYW5rcy5wYXJ0LjErMHgyOTgvMHgyYTApCiBb PGMwNDBjZDUwPl0gKGRybV9hdG9taWNfaGVscGVyX3dhaXRfZm9yX3ZibGFua3MucGFydC4xKSBm cm9tIFs8YzA0MGU2OTQ+XSAoZHJtX2F0b21pY19oZWxwZXJfY29tbWl0X3RhaWxfcnBtKzB4NWMv MHg2YykKIFs8YzA0MGU2OTQ+XSAoZHJtX2F0b21pY19oZWxwZXJfY29tbWl0X3RhaWxfcnBtKSBm cm9tIFs8YzA0MGU0ZGM+XSAoY29tbWl0X3RhaWwrMHg0MC8weDZjKQogWzxjMDQwZTRkYz5dIChj b21taXRfdGFpbCkgZnJvbSBbPGMwNDBlNWNjPl0gKGRybV9hdG9taWNfaGVscGVyX2NvbW1pdCsw eGJjLzB4MTI4KQogWzxjMDQwZTVjYz5dIChkcm1fYXRvbWljX2hlbHBlcl9jb21taXQpIGZyb20g WzxjMDQxMWI2ND5dIChyZXN0b3JlX2ZiZGV2X21vZGVfYXRvbWljKzB4MWNjLzB4MWRjKQogWzxj MDQxMWI2ND5dIChyZXN0b3JlX2ZiZGV2X21vZGVfYXRvbWljKSBmcm9tIFs8YzA0MTU2Zjg+XSAo ZHJtX2ZiX2hlbHBlcl9yZXN0b3JlX2ZiZGV2X21vZGVfdW5sb2NrZWQrMHg1NC8weGEwKQogWzxj MDQxNTZmOD5dIChkcm1fZmJfaGVscGVyX3Jlc3RvcmVfZmJkZXZfbW9kZV91bmxvY2tlZCkgZnJv bSBbPGMwNDE1Nzc0Pl0gKGRybV9mYl9oZWxwZXJfc2V0X3BhcisweDMwLzB4NTQpCiBbPGMwNDE1 Nzc0Pl0gKGRybV9mYl9oZWxwZXJfc2V0X3BhcikgZnJvbSBbPGMwM2FkNDUwPl0gKGZiY29uX2lu aXQrMHg1NjAvMHg1YWMpCiBbPGMwM2FkNDUwPl0gKGZiY29uX2luaXQpIGZyb20gWzxjMDNlYjhh MD5dICh2aXN1YWxfaW5pdCsweGJjLzB4MTA0KQogWzxjMDNlYjhhMD5dICh2aXN1YWxfaW5pdCkg ZnJvbSBbPGMwM2VkMWI4Pl0gKGRvX2JpbmRfY29uX2RyaXZlcisweDFiMC8weDM5MCkKIFs8YzAz ZWQxYjg+XSAoZG9fYmluZF9jb25fZHJpdmVyKSBmcm9tIFs8YzAzZWQ3ODA+XSAoZG9fdGFrZV9v dmVyX2NvbnNvbGUrMHgxM2MvMHgxYzQpCiBbPGMwM2VkNzgwPl0gKGRvX3Rha2Vfb3Zlcl9jb25z b2xlKSBmcm9tIFs8YzAzYWQ4MDA+XSAoZG9fZmJjb25fdGFrZW92ZXIrMHg3NC8weGNjKQogWzxj MDNhZDgwMD5dIChkb19mYmNvbl90YWtlb3ZlcikgZnJvbSBbPGMwMTNjOWM4Pl0gKG5vdGlmaWVy X2NhbGxfY2hhaW4rMHg0NC8weDg0KQogWzxjMDEzYzljOD5dIChub3RpZmllcl9jYWxsX2NoYWlu KSBmcm9tIFs8YzAxM2NkMjA+XSAoX19ibG9ja2luZ19ub3RpZmllcl9jYWxsX2NoYWluKzB4NDgv MHg2MCkKIFs8YzAxM2NkMjA+XSAoX19ibG9ja2luZ19ub3RpZmllcl9jYWxsX2NoYWluKSBmcm9t IFs8YzAxM2NkNTA+XSAoYmxvY2tpbmdfbm90aWZpZXJfY2FsbF9jaGFpbisweDE4LzB4MjApCiBb PGMwMTNjZDUwPl0gKGJsb2NraW5nX25vdGlmaWVyX2NhbGxfY2hhaW4pIGZyb20gWzxjMDNhNmU0 ND5dIChyZWdpc3Rlcl9mcmFtZWJ1ZmZlcisweDFlMC8weDJmOCkKIFs8YzAzYTZlNDQ+XSAocmVn aXN0ZXJfZnJhbWVidWZmZXIpIGZyb20gWzxjMDQxNTNjMD5dIChfX2RybV9mYl9oZWxwZXJfaW5p dGlhbF9jb25maWdfYW5kX3VubG9jaysweDJmYy8weDUwYykKIFs8YzA0MTUzYzA+XSAoX19kcm1f ZmJfaGVscGVyX2luaXRpYWxfY29uZmlnX2FuZF91bmxvY2spIGZyb20gWzxjMDQxNThjOD5dIChk cm1fZmJkZXZfY2xpZW50X2hvdHBsdWcrMHhlOC8weDFiOCkKIFs8YzA0MTU4Yzg+XSAoZHJtX2Zi ZGV2X2NsaWVudF9ob3RwbHVnKSBmcm9tIFs8YzA0MTVhMjA+XSAoZHJtX2ZiZGV2X2dlbmVyaWNf c2V0dXArMHg4OC8weDExOCkKIFs8YzA0MTVhMjA+XSAoZHJtX2ZiZGV2X2dlbmVyaWNfc2V0dXAp IGZyb20gWzxjMDQzZjA2MD5dIChzdW40aV9kcnZfYmluZCsweDEyOC8weDE2MCkKIFs8YzA0M2Yw NjA+XSAoc3VuNGlfZHJ2X2JpbmQpIGZyb20gWzxjMDQ0YjU4OD5dICh0cnlfdG9fYnJpbmdfdXBf bWFzdGVyKzB4MTY0LzB4MWEwKQogWzxjMDQ0YjU4OD5dICh0cnlfdG9fYnJpbmdfdXBfbWFzdGVy KSBmcm9tIFs8YzA0NGI2NTg+XSAoX19jb21wb25lbnRfYWRkKzB4OTQvMHgxNDApCiBbPGMwNDRi NjU4Pl0gKF9fY29tcG9uZW50X2FkZCkgZnJvbSBbPGMwNDQ1ZTBjPl0gKHN1bjZpX2RzaV9wcm9i ZSsweDE0NC8weDIzNCkKIFs8YzA0NDVlMGM+XSAoc3VuNmlfZHNpX3Byb2JlKSBmcm9tIFs8YzA0 NTJlZTQ+XSAocGxhdGZvcm1fZHJ2X3Byb2JlKzB4NDgvMHg5YykKIFs8YzA0NTJlZTQ+XSAocGxh dGZvcm1fZHJ2X3Byb2JlKSBmcm9tIFs8YzA0NTEyYmM+XSAocmVhbGx5X3Byb2JlKzB4MWRjLzB4 MmM4KQogWzxjMDQ1MTJiYz5dIChyZWFsbHlfcHJvYmUpIGZyb20gWzxjMDQ1MTUwOD5dIChkcml2 ZXJfcHJvYmVfZGV2aWNlKzB4NjAvMHgxNjApCiBbPGMwNDUxNTA4Pl0gKGRyaXZlcl9wcm9iZV9k ZXZpY2UpIGZyb20gWzxjMDQ0Zjc5ND5dIChidXNfZm9yX2VhY2hfZHJ2KzB4NzQvMHhiOCkKIFs8 YzA0NGY3OTQ+XSAoYnVzX2Zvcl9lYWNoX2RydikgZnJvbSBbPGMwNDUxMDZjPl0gKF9fZGV2aWNl X2F0dGFjaCsweGQwLzB4MTNjKQogWzxjMDQ1MTA2Yz5dIChfX2RldmljZV9hdHRhY2gpIGZyb20g WzxjMDQ1MDQ2ND5dIChidXNfcHJvYmVfZGV2aWNlKzB4ODQvMHg4YykKIFs8YzA0NTA0NjQ+XSAo YnVzX3Byb2JlX2RldmljZSkgZnJvbSBbPGMwNDUwOGYwPl0gKGRlZmVycmVkX3Byb2JlX3dvcmtf ZnVuYysweDY0LzB4OTApCiBbPGMwNDUwOGYwPl0gKGRlZmVycmVkX3Byb2JlX3dvcmtfZnVuYykg ZnJvbSBbPGMwMTM1OTcwPl0gKHByb2Nlc3Nfb25lX3dvcmsrMHgyMDQvMHg0MjApCiBbPGMwMTM1 OTcwPl0gKHByb2Nlc3Nfb25lX3dvcmspIGZyb20gWzxjMDEzNjkwYz5dICh3b3JrZXJfdGhyZWFk KzB4Mjc0LzB4NWEwKQogWzxjMDEzNjkwYz5dICh3b3JrZXJfdGhyZWFkKSBmcm9tIFs8YzAxM2Iz ZDg+XSAoa3RocmVhZCsweDExYy8weDE0YykKIFs8YzAxM2IzZDg+XSAoa3RocmVhZCkgZnJvbSBb PGMwMTAxMGU4Pl0gKHJldF9mcm9tX2ZvcmsrMHgxNC8weDJjKQogRXhjZXB0aW9uIHN0YWNrKDB4 ZGU1MzlmYjAgdG8gMHhkZTUzOWZmOCkKIDlmYTA6ICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgIDAwMDAwMDAwIDAwMDAwMDAwIDAwMDAwMDAwIDAwMDAwMDAwCiA5ZmMwOiAwMDAw MDAwMCAwMDAwMDAwMCAwMDAwMDAwMCAwMDAwMDAwMCAwMDAwMDAwMCAwMDAwMDAwMCAwMDAwMDAw MCAwMDAwMDAwMAogOWZlMDogMDAwMDAwMDAgMDAwMDAwMDAgMDAwMDAwMDAgMDAwMDAwMDAgMDAw MDAwMTMgMDAwMDAwMDAKIC0tLVsgZW5kIHRyYWNlIDQwMTdmZWE0OTA2YWIzOTEgXS0tLQoKQnV0 IGFjY29yZGluZ2x5IHRvIEFsbHdpbm5lciBBMzMsIEE2NCBCU1AgY29kZXMgWzFdIFsyXSB0aGlz IGRpdmlkZXIKaXMgY2xlYXJseSB1c2luZyAnZm9ybWF0L2xhbmVzJyBmb3IgZHNpIGRpdmlkZXIg dmFsdWUsIGRzaV9jbGsuY2xrX2RpdgoKV2hpY2ggd291bGQgY29tcHV0ZSB0aGUgcGxsX2ZyZXEg YW5kIHNldCBhIGNsb2NrIHJhdGUgZm9yIGl0IGluClszXSBhbmQgWzRdIHJlc3BlY3RpdmVseS4K ClRoZSBzYW1lIGlzc3VlIGhhcyByZXByb2R1Y2VkIGluIEEzMywgQTY0IHdpdGggNC1sYW5lIGFu ZCAyLWxhbmUgZGV2aWNlcwphbmQgZ290IGZpeGVkIHdpdGggdGhpcyBjb21wdXRhdGlvbiBsb2dp YyAnZm9ybWF0L2xhbmVzJywgc28gdGhpcyBwYXRjaAp1c2luZyBkY2xrIG1pbiBhbmQgbWF4IGRp dmlkZXJzIGFzIHBlciBCU1AuCgpbMV0gaHR0cHM6Ly9naXRodWIuY29tL0JQSS1TSU5PVk9JUC9C UEktTTJNLWJzcC9ibG9iL21hc3Rlci9saW51eC1zdW54aS9kcml2ZXJzL3ZpZGVvL3N1bnhpL2Rp c3AvZGUvZGlzcF9sY2QuYyNMMTEwNgpbMl0gaHR0cHM6Ly9naXRodWIuY29tL0JQSS1TSU5PVk9J UC9CUEktTTY0LWJzcC9ibG9iL21hc3Rlci9saW51eC1zdW54aS9kcml2ZXJzL3ZpZGVvL3N1bnhp L2Rpc3AyL2Rpc3AvZGUvbG93bGV2ZWxfc3VuNTBpdzEvZGlzcF9hbC5jI0wyMTMKWzNdIGh0dHBz Oi8vZ2l0aHViLmNvbS9CUEktU0lOT1ZPSVAvQlBJLU0yTS1ic3AvYmxvYi9tYXN0ZXIvbGludXgt c3VueGkvZHJpdmVycy92aWRlby9zdW54aS9kaXNwL2RlL2Rpc3BfbGNkLmMjTDExMjcKWzRdIGh0 dHBzOi8vZ2l0aHViLmNvbS9CUEktU0lOT1ZPSVAvQlBJLU0yTS1ic3AvYmxvYi9tYXN0ZXIvbGlu dXgtc3VueGkvZHJpdmVycy92aWRlby9zdW54aS9kaXNwL2RlL2Rpc3BfbGNkLmMjTDExNjEKClRl c3RlZC1ieTogTWVybGlqbiBXYWplciA8bWVybGlqbkB3aXp6dXAub3JnPgpTaWduZWQtb2ZmLWJ5 OiBKYWdhbiBUZWtpIDxqYWdhbkBhbWFydWxhc29sdXRpb25zLmNvbT4KLS0tCiBkcml2ZXJzL2dw dS9kcm0vc3VuNGkvc3VuNGlfdGNvbi5jIHwgNCArKy0tCiAxIGZpbGUgY2hhbmdlZCwgMiBpbnNl cnRpb25zKCspLCAyIGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9z dW40aS9zdW40aV90Y29uLmMgYi9kcml2ZXJzL2dwdS9kcm0vc3VuNGkvc3VuNGlfdGNvbi5jCmlu ZGV4IDlkOGQ4MTI0YjFmNi4uOGY5MzEyMWZlYWQ0IDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9k cm0vc3VuNGkvc3VuNGlfdGNvbi5jCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9zdW40aS9zdW40aV90 Y29uLmMKQEAgLTM0MSw4ICszNDEsOCBAQCBzdGF0aWMgdm9pZCBzdW40aV90Y29uMF9tb2RlX3Nl dF9jcHUoc3RydWN0IHN1bjRpX3Rjb24gKnRjb24sCiAJdTMyIGJsb2NrX3NwYWNlLCBzdGFydF9k ZWxheTsKIAl1MzIgdGNvbl9kaXY7CiAKLQl0Y29uLT5kY2xrX21pbl9kaXYgPSBTVU42SV9EU0lf VENPTl9ESVY7Ci0JdGNvbi0+ZGNsa19tYXhfZGl2ID0gU1VONklfRFNJX1RDT05fRElWOworCXRj b24tPmRjbGtfbWluX2RpdiA9IGJwcC9sYW5lczsKKwl0Y29uLT5kY2xrX21heF9kaXYgPSBicHAv bGFuZXM7CiAKIAlzdW40aV90Y29uMF9tb2RlX3NldF9jb21tb24odGNvbiwgbW9kZSk7CiAKLS0g CjIuMTguMC4zMjEuZ2ZmYzZmYTBlMwoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJl ZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGlu Zm8vZHJpLWRldmVs