From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A757C04AAF for ; Tue, 21 May 2019 10:46:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 52A8B20856 for ; Tue, 21 May 2019 10:46:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 52A8B20856 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=cl.cam.ac.uk Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([127.0.0.1]:51228 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hT2Hv-0005Y1-Gj for qemu-devel@archiver.kernel.org; Tue, 21 May 2019 06:46:31 -0400 Received: from eggs.gnu.org ([209.51.188.92]:54681) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hT2GD-0003nJ-Fx for qemu-devel@nongnu.org; Tue, 21 May 2019 06:44:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hT2GC-0003yg-Jf for qemu-devel@nongnu.org; Tue, 21 May 2019 06:44:45 -0400 Received: from mta1.cl.cam.ac.uk ([2a05:b400:110::25:1]:41693) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hT2GA-0003vd-Je; Tue, 21 May 2019 06:44:42 -0400 Received: from cassia.cl.cam.ac.uk ([2001:630:212:238:b26e:bfff:fe2f:c7d9]) by mta1.cl.cam.ac.uk with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1hT2G9-00017W-Qt; Tue, 21 May 2019 10:44:41 +0000 Received: from hmka2 by cassia.cl.cam.ac.uk with local (Exim 4.90_1) (envelope-from ) id 1hT2G9-0003rD-On; Tue, 21 May 2019 11:44:41 +0100 From: Hesham Almatary To: qemu-riscv@nongnu.org Date: Tue, 21 May 2019 11:43:24 +0100 Message-Id: <20190521104324.12835-5-Hesham.Almatary@cl.cam.ac.uk> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190521104324.12835-1-Hesham.Almatary@cl.cam.ac.uk> References: <20190521104324.12835-1-Hesham.Almatary@cl.cam.ac.uk> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a05:b400:110::25:1 Subject: [Qemu-devel] [PATCHv3 5/5] RISC-V: Fix a PMP check with the correct access size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Bastian Koppelmann , Palmer Dabbelt , qemu-devel@nongnu.org, Alistair Francis , Hesham Almatary Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The PMP check should be of the memory access size rather than TARGET_PAGE_SIZE. Signed-off-by: Hesham Almatary --- target/riscv/cpu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index d0b0f9cf88..ce1f47e4e3 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -410,7 +410,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (riscv_feature(env, RISCV_FEATURE_PMP) && (ret == TRANSLATE_SUCCESS) && - !pmp_hart_has_privs(env, pa, TARGET_PAGE_SIZE, 1 << access_type)) { + !pmp_hart_has_privs(env, pa, size, 1 << access_type)) { ret = TRANSLATE_PMP_FAIL; } if (ret == TRANSLATE_PMP_FAIL) { -- 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.71) id 1hT2GE-0003nh-48 for mharc-qemu-riscv@gnu.org; Tue, 21 May 2019 06:44:46 -0400 Received: from eggs.gnu.org ([209.51.188.92]:54641) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hT2GB-0003le-LP for qemu-riscv@nongnu.org; Tue, 21 May 2019 06:44:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hT2GA-0003wY-PH for qemu-riscv@nongnu.org; Tue, 21 May 2019 06:44:43 -0400 Received: from mta1.cl.cam.ac.uk ([2a05:b400:110::25:1]:41693) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hT2GA-0003vd-Je; Tue, 21 May 2019 06:44:42 -0400 Received: from cassia.cl.cam.ac.uk ([2001:630:212:238:b26e:bfff:fe2f:c7d9]) by mta1.cl.cam.ac.uk with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1hT2G9-00017W-Qt; Tue, 21 May 2019 10:44:41 +0000 Received: from hmka2 by cassia.cl.cam.ac.uk with local (Exim 4.90_1) (envelope-from ) id 1hT2G9-0003rD-On; Tue, 21 May 2019 11:44:41 +0100 From: Hesham Almatary To: qemu-riscv@nongnu.org Cc: qemu-devel@nongnu.org, Hesham Almatary , Palmer Dabbelt , Alistair Francis , Sagar Karandikar , Bastian Koppelmann Date: Tue, 21 May 2019 11:43:24 +0100 Message-Id: <20190521104324.12835-5-Hesham.Almatary@cl.cam.ac.uk> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190521104324.12835-1-Hesham.Almatary@cl.cam.ac.uk> References: <20190521104324.12835-1-Hesham.Almatary@cl.cam.ac.uk> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a05:b400:110::25:1 Subject: [Qemu-riscv] [PATCHv3 5/5] RISC-V: Fix a PMP check with the correct access size X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 May 2019 10:44:44 -0000 The PMP check should be of the memory access size rather than TARGET_PAGE_SIZE. Signed-off-by: Hesham Almatary --- target/riscv/cpu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index d0b0f9cf88..ce1f47e4e3 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -410,7 +410,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (riscv_feature(env, RISCV_FEATURE_PMP) && (ret == TRANSLATE_SUCCESS) && - !pmp_hart_has_privs(env, pa, TARGET_PAGE_SIZE, 1 << access_type)) { + !pmp_hart_has_privs(env, pa, size, 1 << access_type)) { ret = TRANSLATE_PMP_FAIL; } if (ret == TRANSLATE_PMP_FAIL) { -- 2.17.1