From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,T_DKIMWL_WL_HIGH,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B1C2C282DD for ; Thu, 23 May 2019 19:45:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DC45A20851 for ; Thu, 23 May 2019 19:45:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1558640717; bh=2yOBiJ/ADzN5mUmjQMi39EZs/vsECzak1Apuewu9mss=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=lpx70EHcFvxDT3UT5scwCdZzpxvzvjCfoR0CVu0sxiJwGNfl2LGy0OOxNi8EvCyf8 nLr5C5XDda9dq5Jh0ZaANIzAYZ/w32g4HOf5hUTLBk0c9v6pe1sr9sSO1EoxLhk/0q C0B7thvRHI/9kVfRGEneZljvuJ+vPqdBN0bNipgs= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389727AbfEWTpQ (ORCPT ); Thu, 23 May 2019 15:45:16 -0400 Received: from mail.kernel.org ([198.145.29.99]:50304 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389077AbfEWTPt (ORCPT ); Thu, 23 May 2019 15:15:49 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8B58A217D7; Thu, 23 May 2019 19:15:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1558638949; bh=2yOBiJ/ADzN5mUmjQMi39EZs/vsECzak1Apuewu9mss=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aUzT0gL2VIzgEXWClu4uWM8yqwib7QTtLix+0lqNq2ubPMqXWVuBrnqQxFMl8plkk N/AH7YjkE5i/0NvlRfTjRSr47jMiW6IXbx3Jiurju5sGv4H+BYqohRIanOJ5HrSG+J X1N5bzfpfyWwQiZOkkL+fzG1QBF0VDvcPrVy9Wmg= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Steev Klimaszewski , Dmitry Osipenko , Peter De Schrijver , Stephen Boyd Subject: [PATCH 4.19 040/114] clk: tegra: Fix PLLM programming on Tegra124+ when PMC overrides divider Date: Thu, 23 May 2019 21:05:39 +0200 Message-Id: <20190523181735.397285171@linuxfoundation.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190523181731.372074275@linuxfoundation.org> References: <20190523181731.372074275@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dmitry Osipenko commit 40db569d6769ffa3864fd1b89616b1a7323568a8 upstream. There are wrongly set parenthesis in the code that are resulting in a wrong configuration being programmed for PLLM. The original fix was made by Danny Huang in the downstream kernel. The patch was tested on Nyan Big Tegra124 chromebook, PLLM rate changing works correctly now and system doesn't lock up after changing the PLLM rate due to EMC scaling. Cc: Tested-by: Steev Klimaszewski Signed-off-by: Dmitry Osipenko Acked-By: Peter De Schrijver Signed-off-by: Stephen Boyd Signed-off-by: Greg Kroah-Hartman --- drivers/clk/tegra/clk-pll.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -662,8 +662,8 @@ static void _update_pll_mnp(struct tegra pll_override_writel(val, params->pmc_divp_reg, pll); val = pll_override_readl(params->pmc_divnm_reg, pll); - val &= ~(divm_mask(pll) << div_nmp->override_divm_shift) | - ~(divn_mask(pll) << div_nmp->override_divn_shift); + val &= ~((divm_mask(pll) << div_nmp->override_divm_shift) | + (divn_mask(pll) << div_nmp->override_divn_shift)); val |= (cfg->m << div_nmp->override_divm_shift) | (cfg->n << div_nmp->override_divn_shift); pll_override_writel(val, params->pmc_divnm_reg, pll);