From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B50DC072B5 for ; Fri, 24 May 2019 08:21:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 637D82175B for ; Fri, 24 May 2019 08:21:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389660AbfEXIVD (ORCPT ); Fri, 24 May 2019 04:21:03 -0400 Received: from mga07.intel.com ([134.134.136.100]:38552 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389462AbfEXIVD (ORCPT ); Fri, 24 May 2019 04:21:03 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 May 2019 01:21:02 -0700 X-ExtLoop1: 1 Received: from tao-optiplex-7060.sh.intel.com ([10.239.13.104]) by fmsmga007.fm.intel.com with ESMTP; 24 May 2019 01:20:59 -0700 From: Tao Xu To: pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com Cc: cohuck@redhat.com, mst@redhat.com, mtosatti@redhat.com, qemu-devel@nongnu.org, kvm@vger.kernel.org, tao3.xu@intel.com, jingqi.liu@intel.com Subject: [PATCH v2 0/2] x86: Enable user wait instructions Date: Fri, 24 May 2019 16:18:37 +0800 Message-Id: <20190524081839.6228-1-tao3.xu@intel.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org UMONITOR, UMWAIT and TPAUSE are a set of user wait instructions. UMONITOR arms address monitoring hardware using an address. A store to an address within the specified address range triggers the monitoring hardware to wake up the processor waiting in umwait. UMWAIT instructs the processor to enter an implementation-dependent optimized state while monitoring a range of addresses. The optimized state may be either a light-weight power/performance optimized state (c0.1 state) or an improved power/performance optimized state (c0.2 state). TPAUSE instructs the processor to enter an implementation-dependent optimized state c0.1 or c0.2 state and wake up when time-stamp counter reaches specified timeout. Availability of the user wait instructions is indicated by the presence of the CPUID feature flag WAITPKG CPUID.0x07.0x0:ECX[5]. The patches enable the umonitor, umwait and tpause features in KVM. Because umwait and tpause can put a (psysical) CPU into a power saving state, by default we dont't expose it in kvm and provide a capability to enable it. Use kvm capability to enable UMONITOR, UMWAIT and TPAUSE when QEMU use "-overcommit cpu-pm=on, a VM can use UMONITOR, UMWAIT and TPAUSE instructions. If the instruction causes a delay, the amount of time delayed is called here the physical delay. The physical delay is first computed by determining the virtual delay (the time to delay relative to the VM’s timestamp counter). Otherwise, UMONITOR, UMWAIT and TPAUSE cause an invalid-opcode exception(#UD). The dependency KVM patch link: https://lkml.org/lkml/2019/5/24/138 The release document ref below link: https://software.intel.com/sites/default/files/\ managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf Changelog: v2: Separated from the series https://www.mail-archive.com/qemu-devel@nongnu.org/msg549526.html Use kvm capability to enable UMONITOR, UMWAIT and TPAUSE when QEMU use "-overcommit cpu-pm=on" v1: Sent out with MOVDIRI/MOVDIR64B instructions patches Tao Xu (2): x86/cpu: Add support for UMONITOR/UMWAIT/TPAUSE target/i386: Add support for save/load IA32_UMWAIT_CONTROL MSR linux-headers/linux/kvm.h | 1 + target/i386/cpu.c | 3 ++- target/i386/cpu.h | 3 +++ target/i386/kvm.c | 28 ++++++++++++++++++++++++++++ target/i386/machine.c | 20 ++++++++++++++++++++ 5 files changed, 54 insertions(+), 1 deletion(-) -- 2.20.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CB84C072B5 for ; Fri, 24 May 2019 08:22:52 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 520882175B for ; Fri, 24 May 2019 08:22:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 520882175B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([127.0.0.1]:50908 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU5TX-0004LC-Fl for qemu-devel@archiver.kernel.org; Fri, 24 May 2019 04:22:51 -0400 Received: from eggs.gnu.org ([209.51.188.92]:37285) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU5Rw-0003Oa-DD for qemu-devel@nongnu.org; Fri, 24 May 2019 04:21:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hU5Rv-00014p-3x for qemu-devel@nongnu.org; Fri, 24 May 2019 04:21:12 -0400 Received: from mga02.intel.com ([134.134.136.20]:29951) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hU5Ru-0000Mj-QE for qemu-devel@nongnu.org; Fri, 24 May 2019 04:21:11 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 May 2019 01:21:02 -0700 X-ExtLoop1: 1 Received: from tao-optiplex-7060.sh.intel.com ([10.239.13.104]) by fmsmga007.fm.intel.com with ESMTP; 24 May 2019 01:20:59 -0700 From: Tao Xu To: pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com Date: Fri, 24 May 2019 16:18:37 +0800 Message-Id: <20190524081839.6228-1-tao3.xu@intel.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.20 Subject: [Qemu-devel] [PATCH v2 0/2] x86: Enable user wait instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cohuck@redhat.com, kvm@vger.kernel.org, mst@redhat.com, jingqi.liu@intel.com, tao3.xu@intel.com, mtosatti@redhat.com, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" UMONITOR, UMWAIT and TPAUSE are a set of user wait instructions. UMONITOR arms address monitoring hardware using an address. A store to an address within the specified address range triggers the monitoring hardware to wake up the processor waiting in umwait. UMWAIT instructs the processor to enter an implementation-dependent optimized state while monitoring a range of addresses. The optimized state may be either a light-weight power/performance optimized state (c0.1 state) or an improved power/performance optimized state (c0.2 state). TPAUSE instructs the processor to enter an implementation-dependent optimized state c0.1 or c0.2 state and wake up when time-stamp counter reaches specified timeout. Availability of the user wait instructions is indicated by the presence of the CPUID feature flag WAITPKG CPUID.0x07.0x0:ECX[5]. The patches enable the umonitor, umwait and tpause features in KVM. Because umwait and tpause can put a (psysical) CPU into a power saving state, by default we dont't expose it in kvm and provide a capability to enable it. Use kvm capability to enable UMONITOR, UMWAIT and TPAUSE when QEMU use "-overcommit cpu-pm=on, a VM can use UMONITOR, UMWAIT and TPAUSE instructions. If the instruction causes a delay, the amount of time delayed is called here the physical delay. The physical delay is first computed by determining the virtual delay (the time to delay relative to the VM’s timestamp counter). Otherwise, UMONITOR, UMWAIT and TPAUSE cause an invalid-opcode exception(#UD). The dependency KVM patch link: https://lkml.org/lkml/2019/5/24/138 The release document ref below link: https://software.intel.com/sites/default/files/\ managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf Changelog: v2: Separated from the series https://www.mail-archive.com/qemu-devel@nongnu.org/msg549526.html Use kvm capability to enable UMONITOR, UMWAIT and TPAUSE when QEMU use "-overcommit cpu-pm=on" v1: Sent out with MOVDIRI/MOVDIR64B instructions patches Tao Xu (2): x86/cpu: Add support for UMONITOR/UMWAIT/TPAUSE target/i386: Add support for save/load IA32_UMWAIT_CONTROL MSR linux-headers/linux/kvm.h | 1 + target/i386/cpu.c | 3 ++- target/i386/cpu.h | 3 +++ target/i386/kvm.c | 28 ++++++++++++++++++++++++++++ target/i386/machine.c | 20 ++++++++++++++++++++ 5 files changed, 54 insertions(+), 1 deletion(-) -- 2.20.1