From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6ED35C04AB3 for ; Mon, 27 May 2019 12:14:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4CF1E2184E for ; Mon, 27 May 2019 12:14:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727225AbfE0MOa (ORCPT ); Mon, 27 May 2019 08:14:30 -0400 Received: from muru.com ([72.249.23.125]:51218 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727201AbfE0MO2 (ORCPT ); Mon, 27 May 2019 08:14:28 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id C03578123; Mon, 27 May 2019 12:14:46 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: Dave Gerlach , Faiz Abbas , Greg Kroah-Hartman , Keerthy , Nishanth Menon , Peter Ujfalusi , Roger Quadros , Suman Anna , Tero Kristo , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org Subject: [PATCH 09/12] bus: ti-sysc: Do rstctrl reset handling in two phases Date: Mon, 27 May 2019 05:13:45 -0700 Message-Id: <20190527121348.45251-10-tony@atomide.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190527121348.45251-1-tony@atomide.com> References: <20190527121348.45251-1-tony@atomide.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We need to deassert rstctrl resets before enabling clocks to avoid clock "failed to enable" errors. For asserting rstctrl reset, the clocks need to be enabled. As the reset controller status is not available for arrays, let's use devm_reset_control_get_optional() so we can get the status after reset. Note that depends on a proper PRM rstctrl driver, so far I've only tested this with earlier reset-simple patches. Signed-off-by: Tony Lindgren --- drivers/bus/ti-sysc.c | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c --- a/drivers/bus/ti-sysc.c +++ b/drivers/bus/ti-sysc.c @@ -483,7 +483,7 @@ static void sysc_clkdm_allow_idle(struct sysc *ddata) static int sysc_init_resets(struct sysc *ddata) { ddata->rsts = - devm_reset_control_array_get_optional_exclusive(ddata->dev); + devm_reset_control_get_optional(ddata->dev, "rstctrl"); if (IS_ERR(ddata->rsts)) return PTR_ERR(ddata->rsts); @@ -1407,7 +1407,7 @@ static int sysc_legacy_init(struct sysc *ddata) */ static int sysc_rstctrl_reset_deassert(struct sysc *ddata, bool reset) { - int error; + int error, val; if (!ddata->rsts) return 0; @@ -1418,7 +1418,14 @@ static int sysc_rstctrl_reset_deassert(struct sysc *ddata, bool reset) return error; } - return reset_control_deassert(ddata->rsts); + error = reset_control_deassert(ddata->rsts); + if (error == -EEXIST) + return 0; + + error = readx_poll_timeout(reset_control_status, ddata->rsts, val, + val == 0, 100, MAX_MODULE_SOFTRESET_WAIT); + + return error; } /* @@ -1476,12 +1483,8 @@ static int sysc_init_module(struct sysc *ddata) { int error = 0; bool manage_clocks = true; - bool reset = true; - if (ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) - reset = false; - - error = sysc_rstctrl_reset_deassert(ddata, reset); + error = sysc_rstctrl_reset_deassert(ddata, false); if (error) return error; @@ -1505,6 +1508,12 @@ static int sysc_init_module(struct sysc *ddata) goto err_opt_clocks; } + if (!(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)) { + error = sysc_rstctrl_reset_deassert(ddata, true); + if (error) + goto err_main_clocks; + } + ddata->revision = sysc_read_revision(ddata); sysc_init_revision_quirks(ddata); -- 2.21.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,T_DKIMWL_WL_HIGH,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11177C04AB3 for ; Mon, 27 May 2019 12:17:00 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D9B2B214D8 for ; Mon, 27 May 2019 12:16:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="qW0oCGp/" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D9B2B214D8 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=atomide.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=m6TLnaF2tP+5OmrbcX3phYnchRE1nGyAH4aS3vOkogs=; b=qW0oCGp/pA5q3P 4z/TKM+nelKH5Umss7qzn+2v6zjRNb1+bmjiSkjb9ZzoETwBiBot6XreBJb8XKk4zd+6tQP8h1zkR 6kcJGGD/c9mdBWtoDd2gmPGQ+8NrtsEU6CRywLOO+uOpEGuu7J+wfGWtIj+0PxH/1Q8A2ci6dDOLO dSpq4xmSWsvnVg4bA49Z6OhfWGOoCGdOD57tO5zV9epSOEhnpepYK0OCH2cJ20FyPAKbnX97uxomo Cw0cuODegZ5mPlc/GQKZdktwHSH9u/7qXiUKvG35lu87Uh7uXHPL1i3HwETiVNUUMWUz6PLrfn947 5vMMlRrKmLYhvUqowaKA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hVEYd-0005vW-4U; Mon, 27 May 2019 12:16:51 +0000 Received: from muru.com ([72.249.23.125]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hVEWK-0002KT-Bj for linux-arm-kernel@lists.infradead.org; Mon, 27 May 2019 12:14:33 +0000 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id C03578123; Mon, 27 May 2019 12:14:46 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Subject: [PATCH 09/12] bus: ti-sysc: Do rstctrl reset handling in two phases Date: Mon, 27 May 2019 05:13:45 -0700 Message-Id: <20190527121348.45251-10-tony@atomide.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190527121348.45251-1-tony@atomide.com> References: <20190527121348.45251-1-tony@atomide.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190527_051429_119764_71BCDFE2 X-CRM114-Status: GOOD ( 12.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , Tero Kristo , Dave Gerlach , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Peter Ujfalusi , devicetree@vger.kernel.org, Faiz Abbas , Keerthy , Suman Anna , Rob Herring , linux-arm-kernel@lists.infradead.org, Roger Quadros Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org We need to deassert rstctrl resets before enabling clocks to avoid clock "failed to enable" errors. For asserting rstctrl reset, the clocks need to be enabled. As the reset controller status is not available for arrays, let's use devm_reset_control_get_optional() so we can get the status after reset. Note that depends on a proper PRM rstctrl driver, so far I've only tested this with earlier reset-simple patches. Signed-off-by: Tony Lindgren --- drivers/bus/ti-sysc.c | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c --- a/drivers/bus/ti-sysc.c +++ b/drivers/bus/ti-sysc.c @@ -483,7 +483,7 @@ static void sysc_clkdm_allow_idle(struct sysc *ddata) static int sysc_init_resets(struct sysc *ddata) { ddata->rsts = - devm_reset_control_array_get_optional_exclusive(ddata->dev); + devm_reset_control_get_optional(ddata->dev, "rstctrl"); if (IS_ERR(ddata->rsts)) return PTR_ERR(ddata->rsts); @@ -1407,7 +1407,7 @@ static int sysc_legacy_init(struct sysc *ddata) */ static int sysc_rstctrl_reset_deassert(struct sysc *ddata, bool reset) { - int error; + int error, val; if (!ddata->rsts) return 0; @@ -1418,7 +1418,14 @@ static int sysc_rstctrl_reset_deassert(struct sysc *ddata, bool reset) return error; } - return reset_control_deassert(ddata->rsts); + error = reset_control_deassert(ddata->rsts); + if (error == -EEXIST) + return 0; + + error = readx_poll_timeout(reset_control_status, ddata->rsts, val, + val == 0, 100, MAX_MODULE_SOFTRESET_WAIT); + + return error; } /* @@ -1476,12 +1483,8 @@ static int sysc_init_module(struct sysc *ddata) { int error = 0; bool manage_clocks = true; - bool reset = true; - if (ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) - reset = false; - - error = sysc_rstctrl_reset_deassert(ddata, reset); + error = sysc_rstctrl_reset_deassert(ddata, false); if (error) return error; @@ -1505,6 +1508,12 @@ static int sysc_init_module(struct sysc *ddata) goto err_opt_clocks; } + if (!(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)) { + error = sysc_rstctrl_reset_deassert(ddata, true); + if (error) + goto err_main_clocks; + } + ddata->revision = sysc_read_revision(ddata); sysc_init_revision_quirks(ddata); -- 2.21.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel