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[73.222.71.142]) by smtp.gmail.com with ESMTPSA id 5sm6574917pgi.28.2019.06.04.07.28.20 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 04 Jun 2019 07:28:21 -0700 (PDT) Date: Tue, 4 Jun 2019 07:28:19 -0700 From: Richard Cochran To: Ido Schimmel Cc: netdev@vger.kernel.org, davem@davemloft.net, jiri@mellanox.com, shalomt@mellanox.com, petrm@mellanox.com, mlxsw@mellanox.com, Ido Schimmel Subject: Re: [PATCH net-next 7/9] mlxsw: spectrum_ptp: Add implementation for physical hardware clock operations Message-ID: <20190604142819.cml2tbkmcj2mvkpl@localhost> References: <20190603121244.3398-1-idosch@idosch.org> <20190603121244.3398-8-idosch@idosch.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190603121244.3398-8-idosch@idosch.org> User-Agent: NeoMutt/20170113 (1.7.2) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Mon, Jun 03, 2019 at 03:12:42PM +0300, Ido Schimmel wrote: > +static int > +mlxsw_sp1_ptp_update_phc_settime(struct mlxsw_sp_ptp_clock *clock, u64 nsec) Six words ^^^ What is wrong with "mlxsw_phc_settime" ? > +{ > + struct mlxsw_core *mlxsw_core = clock->core; > + char mtutc_pl[MLXSW_REG_MTUTC_LEN]; > + char mtpps_pl[MLXSW_REG_MTPPS_LEN]; > + u64 next_sec_in_nsec, cycles; > + u32 next_sec; > + int err; > + > + next_sec = nsec / NSEC_PER_SEC + 1; > + next_sec_in_nsec = next_sec * NSEC_PER_SEC; > + > + spin_lock(&clock->lock); > + cycles = mlxsw_sp1_ptp_ns2cycles(&clock->tc, next_sec_in_nsec); > + spin_unlock(&clock->lock); > + > + mlxsw_reg_mtpps_vpin_pack(mtpps_pl, cycles); > + err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtpps), mtpps_pl); > + if (err) > + return err; > + > + mlxsw_reg_mtutc_pack(mtutc_pl, > + MLXSW_REG_MTUTC_OPERATION_SET_TIME_AT_NEXT_SEC, > + 0, next_sec); > + return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); > +} > + > +static int mlxsw_sp1_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) > +{ > + struct mlxsw_sp_ptp_clock *clock = > + container_of(ptp, struct mlxsw_sp_ptp_clock, ptp_info); > + int neg_adj = 0; > + u32 diff; > + u64 adj; > + s32 ppb; > + > + ppb = ptp_clock_scaled_ppm_to_ppb(scaled_ppm); Now I see why you did this. Nice try. The 'scaled_ppm' has a finer resolution than ppb. Please make use of the finer resolution in your calculation. It does make a difference. > + > + if (ppb < 0) { > + neg_adj = 1; > + ppb = -ppb; > + } > + > + adj = clock->nominal_c_mult; > + adj *= ppb; > + diff = div_u64(adj, NSEC_PER_SEC); > + > + spin_lock(&clock->lock); > + timecounter_read(&clock->tc); > + clock->cycles.mult = neg_adj ? clock->nominal_c_mult - diff : > + clock->nominal_c_mult + diff; > + spin_unlock(&clock->lock); > + > + return mlxsw_sp1_ptp_update_phc_adjfreq(clock, neg_adj ? -ppb : ppb); > +} Thanks, Richard