From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "Souza, Jose" <jose.souza@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 2/2] drm/i915: Kill INTEL_SUBPLATFORM_AML
Date: Thu, 6 Jun 2019 06:14:37 -0700 [thread overview]
Message-ID: <20190606131437.GA3452@intel.com> (raw)
In-Reply-To: <ef733ef6192bbd6a7d024e4b0daca747fb292974.camel@intel.com>
On Wed, Jun 05, 2019 at 06:05:23PM -0700, Souza, Jose wrote:
> This is the same as WHL, we added the AML separated just in case it
> needed some different workaround or code path but looks like it don't
> need at all.
>
> Any objection with this change Rodrigo?
Nope.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> On Wed, 2019-06-05 at 19:29 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > All AML parts are either KBL ULX or CFL ULX so there is no point
> > in keeping INTEL_SUBPLATFORM_AML around. As these are the only
> > CFL ULX parts (normal CFL didn't have Y SKUs) so we'll just
> > replace IS_AML_ULX with IS_CFL_ULX (it was already paired with
> > IS_KBL_ULX which accounts for the other half of the AML parts).
> >
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 5 ++---
> > drivers/gpu/drm/i915/intel_ddi.c | 8 +++++---
> > drivers/gpu/drm/i915/intel_device_info.c | 6 ------
> > drivers/gpu/drm/i915/intel_device_info.h | 1 -
> > 4 files changed, 7 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index 89bf1e34feaa..16ea0e6077cf 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -2213,9 +2213,6 @@ IS_SUBPLATFORM(const struct drm_i915_private
> > *i915,
> > IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULT)
> > #define IS_KBL_ULX(dev_priv) \
> > IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULX)
> > -#define IS_AML_ULX(dev_priv) \
> > - (IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE,
> > INTEL_SUBPLATFORM_AML) || \
> > - IS_SUBPLATFORM(dev_priv, INTEL_COFFEELAKE,
> > INTEL_SUBPLATFORM_AML))
> > #define IS_SKL_GT2(dev_priv) (IS_SKYLAKE(dev_priv) && \
> > INTEL_INFO(dev_priv)->gt == 2)
> > #define IS_SKL_GT3(dev_priv) (IS_SKYLAKE(dev_priv) && \
> > @@ -2228,6 +2225,8 @@ IS_SUBPLATFORM(const struct drm_i915_private
> > *i915,
> > INTEL_INFO(dev_priv)->gt == 3)
> > #define IS_CFL_ULT(dev_priv) \
> > IS_SUBPLATFORM(dev_priv, INTEL_COFFEELAKE,
> > INTEL_SUBPLATFORM_ULT)
> > +#define IS_CFL_ULX(dev_priv) \
> > + IS_SUBPLATFORM(dev_priv, INTEL_COFFEELAKE,
> > INTEL_SUBPLATFORM_ULX)
> > #define IS_CFL_GT2(dev_priv) (IS_COFFEELAKE(dev_priv) && \
> > INTEL_INFO(dev_priv)->gt == 2)
> > #define IS_CFL_GT3(dev_priv) (IS_COFFEELAKE(dev_priv) && \
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > b/drivers/gpu/drm/i915/intel_ddi.c
> > index 350eaf54f01f..65c02b260c98 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -615,7 +615,7 @@ skl_get_buf_trans_dp(struct drm_i915_private
> > *dev_priv, int *n_entries)
> > static const struct ddi_buf_trans *
> > kbl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int
> > *n_entries)
> > {
> > - if (IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
> > + if (IS_KBL_ULX(dev_priv) || IS_CFL_ULX(dev_priv)) {
> > *n_entries = ARRAY_SIZE(kbl_y_ddi_translations_dp);
> > return kbl_y_ddi_translations_dp;
> > } else if (IS_KBL_ULT(dev_priv) || IS_CFL_ULT(dev_priv)) {
> > @@ -631,7 +631,8 @@ static const struct ddi_buf_trans *
> > skl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int
> > *n_entries)
> > {
> > if (dev_priv->vbt.edp.low_vswing) {
> > - if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) ||
> > IS_AML_ULX(dev_priv)) {
> > + if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) ||
> > + IS_CFL_ULX(dev_priv)) {
> > *n_entries =
> > ARRAY_SIZE(skl_y_ddi_translations_edp);
> > return skl_y_ddi_translations_edp;
> > } else if (IS_SKL_ULT(dev_priv) || IS_KBL_ULT(dev_priv)
> > ||
> > @@ -653,7 +654,8 @@ skl_get_buf_trans_edp(struct drm_i915_private
> > *dev_priv, int *n_entries)
> > static const struct ddi_buf_trans *
> > skl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int
> > *n_entries)
> > {
> > - if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) ||
> > IS_AML_ULX(dev_priv)) {
> > + if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) ||
> > + IS_CFL_ULX(dev_priv)) {
> > *n_entries = ARRAY_SIZE(skl_y_ddi_translations_hdmi);
> > return skl_y_ddi_translations_hdmi;
> > } else {
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> > b/drivers/gpu/drm/i915/intel_device_info.c
> > index 19437e8ec6fa..7135d8dc32a7 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.c
> > +++ b/drivers/gpu/drm/i915/intel_device_info.c
> > @@ -787,9 +787,6 @@ static const u16 subplatform_ulx_ids[] = {
> > INTEL_SKL_ULX_GT2_IDS(0),
> > INTEL_KBL_ULX_GT1_IDS(0),
> > INTEL_KBL_ULX_GT2_IDS(0),
> > -};
> > -
> > -static const u16 subplatform_aml_ids[] = {
> > INTEL_AML_KBL_GT2_IDS(0),
> > INTEL_AML_CFL_GT2_IDS(0),
> > };
> > @@ -832,9 +829,6 @@ void intel_device_info_subplatform_init(struct
> > drm_i915_private *i915)
> > /* ULX machines are also considered ULT. */
> > mask |= BIT(INTEL_SUBPLATFORM_ULT);
> > }
> > - } else if (find_devid(devid, subplatform_aml_ids,
> > - ARRAY_SIZE(subplatform_aml_ids))) {
> > - mask = BIT(INTEL_SUBPLATFORM_AML);
> > } else if (find_devid(devid, subplatform_portf_ids,
> > ARRAY_SIZE(subplatform_portf_ids))) {
> > mask = BIT(INTEL_SUBPLATFORM_PORTF);
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.h
> > b/drivers/gpu/drm/i915/intel_device_info.h
> > index d67dedf0cbd8..ee4776dc59bd 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > @@ -91,7 +91,6 @@ enum intel_platform {
> > /* HSW/BDW/SKL/KBL/CFL */
> > #define INTEL_SUBPLATFORM_ULT (0)
> > #define INTEL_SUBPLATFORM_ULX (1)
> > -#define INTEL_SUBPLATFORM_AML (2)
> >
> > /* CNL/ICL */
> > #define INTEL_SUBPLATFORM_PORTF (0)
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next prev parent reply other threads:[~2019-06-06 13:14 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-05 16:29 [PATCH 1/2] drm/i915: Add missing commas to the end of the subplatform ID arrays Ville Syrjala
2019-06-05 16:29 ` [PATCH 2/2] drm/i915: Kill INTEL_SUBPLATFORM_AML Ville Syrjala
2019-06-06 1:05 ` Souza, Jose
2019-06-06 13:14 ` Rodrigo Vivi [this message]
2019-06-05 17:44 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add missing commas to the end of the subplatform ID arrays Patchwork
2019-06-07 9:09 ` ✓ Fi.CI.IGT: " Patchwork
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